library ieee; use ieee.std_logic_1164.all; entity bjq4 is port(input:in std_logic_vector(15 downto 0); output:out std_logic_vector(3 downto 0)); end bjq4; architecture art of bjq4 is begin process(input) begin if input(15)='0'then output<="0000"; elsif input(14)='0'then output<="0001"; elsif input(13)='0'then output<="0010"; elsif input(12)='0'then output<="0011"; elsif input(11)='0'then output<="0100"; elsif input(10)='0'then output<="0101"; elsif input(9)='0'then output<="0110"; elsif input(8)='0'then output<="0111"; elsif input(7)='0'then output<="1000"; elsif input(6)='0'then output<="1001"; elsif input(5)='0'then output<="1010"; elsif input(4)='0'then output<="1011"; elsif input(3)='0'then output<="1100"; elsif input(2)='0'then output<="1101"; elsif input(1)='0'then output<="1110"; else output<="1111"; end if; end process; end art;用选择信号赋值语句怎么写
时间: 2024-03-15 10:45:25 浏览: 24
使用选择语句(case语句)可以简化代码,如下所示:
```
library ieee;
use ieee.std_logic_1164.all;
entity bjq4 is
port (
input : in std_logic_vector(15 downto 0);
output : out std_logic_vector(3 downto 0)
);
end bjq4;
architecture art of bjq4 is
begin
process(input)
begin
case input(15 downto 12) is
when "0000" =>
output <= "0000";
when "0001" =>
output <= "0001";
when "0010" =>
output <= "0010";
when "0011" =>
output <= "0011";
when "0100" =>
output <= "0100";
when "0101" =>
output <= "0101";
when "0110" =>
output <= "0110";
when "0111" =>
output <= "0111";
when "1000" =>
output <= "1000";
when "1001" =>
output <= "1001";
when "1010" =>
output <= "1010";
when "1011" =>
output <= "1011";
when "1100" =>
output <= "1100";
when "1101" =>
output <= "1101";
when "1110" =>
output <= "1110";
when others =>
output <= "1111";
end case;
end process;
end art;
```
这样代码更简洁易懂,而且易于扩展和维护。
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