fpga led流水灯代码

好的，以下是一个简单的FPGA LED流水灯代码，使用Verilog语言编写：

module led_flow(
    input clk,
    output reg [7:0] led
);

reg [2:0] cnt;

always @(posedge clk) begin
    cnt <= cnt + 1;
    case(cnt)
        3'd0: led <= 8'b00000001;
        3'd1: led <= 8'b00000010;
        3'd2: led <= 8'b00000100;
        3'd3: led <= 8'b00001000;
        3'd4: led <= 8'b00010000;
        3'd5: led <= 8'b00100000;
        3'd6: led <= 8'b01000000;
        3'd7: led <= 8'b10000000;
    endcase
end

endmodule

这个代码使用了一个计数器 `cnt`，每当时钟上升沿到来时，计数器加1。然后根据计数器的值，将对应的LED灯点亮。当计数器达到7时，又从0开始循环。