verilog自动售票状态机

以下是一个简单的 Verilog 自动售票状态机示例：

module ticket_vending_machine(
    input clk,
    input reset,
    input coin,
    input button,
    output reg ticket
);

// 状态定义
typedef enum logic [1:0] {
    IDLE,
    COIN_INSERTED,
    TICKET_ISSUED
} state_e;

// 状态变量和初始状态
state_e state, next_state = IDLE;

// 状态转移逻辑
always @ (posedge clk, posedge reset) begin
    if (reset) begin
        state <= IDLE;
    end else begin
        state <= next_state;
    end
end

// 状态操作逻辑
always @ (state, coin, button) begin
    case (state)
        IDLE: begin
            if (coin) begin
                next_state = COIN_INSERTED;
            end else begin
                next_state = IDLE;
            end
        end
        COIN_INSERTED: begin
            if (button) begin
                next_state = TICKET_ISSUED;
            end else if (coin) begin
                next_state = COIN_INSERTED;
            end else begin
                next_state = IDLE;
            end
        end
        TICKET_ISSUED: begin
            next_state = IDLE;
        end
        default: begin
            next_state = IDLE;
        end
    endcase
end

// 输出操作
always @ (state) begin
    case (state)
        TICKET_ISSUED: begin
            ticket = 1;
        end
        default: begin
            ticket = 0;
        end
    endcase
end

endmodule

该状态机有三种状态：IDLE（空闲）、COIN_INSERTED（硬币已插入）和TICKET_ISSUED（票已发放）。插入硬币将状态从IDLE转移到COIN_INSERTED，按下按钮将状态从COIN_INSERTED转移到TICKET_ISSUED，票发放后状态将返回IDLE。