用vhdl实现一个带使能的32bit寄存器控制的状态机

以下是一个用VHDL实现带使能的32位寄存器控制的状态机的代码示例：

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity register_controlled_fsm is
    Port ( clk : in STD_LOGIC;
           reset : in STD_LOGIC;
           enable : in STD_LOGIC;
           state_out : out STD_LOGIC_VECTOR (3 downto 0);
           reg_out : out STD_LOGIC_VECTOR (31 downto 0));
end register_controlled_fsm;

architecture Behavioral of register_controlled_fsm is
    
    type state_type is (state0, state1, state2, state3);
    signal current_state, next_state : state_type;
    signal reg_data : std_logic_vector(31 downto 0);
    
begin

    process(clk, reset)
    begin
        if reset = '1' then
            current_state <= state0;
            reg_data <= (others => '0');
        elsif rising_edge(clk) then
            if enable = '1' then
                current_state <= next_state;
                reg_data <= reg_data;
            end if;
        end if;
    end process;
    
    process(current_state, reg_data)
    begin
        case current_state is
            
            when state0 =>
                next_state <= state1;
                reg_data <= (others => '0');
                
            when state1 =>
                next_state <= state2;
                reg_data <= "11111111111111111111111111000000";
                
            when state2 =>
                next_state <= state3;
                reg_data <= "00001111000011110000111100001111";
                
            when state3 =>
                next_state <= state0;
                reg_data <= "10101010101010101010101010101010";
                
            when others =>
                next_state <= state0;
                
        end case;
    end process;
    
    state_out <= std_logic_vector(to_unsigned(unsigned(current_state), 4));
    reg_out <= reg_data;
    
end Behavioral;

这个状态机有4个状态，每个状态都会将一个特定的32位数据存储在寄存器中。当使能信号为高电平时，状态机会在当前状态和下一个状态之间进行转换，同时将寄存器中的数据保持不变。状态机的状态由一个状态类型的信号表示，并且使用一个case语句来确定下一个状态和寄存器中的数据。最后，状态机的当前状态和寄存器中的数据通过输出端口输出。