EPwm1Regs.DBRED

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利用ePWM.模块编写三相全桥逆变电路的发波程序，载波频率10Khz

好的，我可以为您提供一份基于C2000系列控制器的ePWM模块编写三相全桥逆变电路的发波程序，载波频率为10kHz的代码：

#include "F28x_Project.h"

#define PWM_PERIOD  1000       // PWM周期为1ms
#define DUTY_CYCLE  500        // 占空比为50%

void main(void)
{
    // 初始化系统时钟
    InitSysCtrl();

    // 初始化GPIO引脚
    InitGpio();

    // 配置PWM引脚复用
    GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;
    GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;
    GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1;
    GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;
    GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1;
    GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1;
    GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1;
    GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1;

    // 初始化ePWM模块
    InitEPwm();

    // 使能全局中断
    EINT;
    ERTM;

    // 死循环
    while (1);
}

void InitEPwm(void)
{
    // 配置PWM时钟
    CpuSysRegs.PCLKCR2.bit.EPWM1 = 1;   // 使能ePWM1时钟
    CpuSysRegs.PCLKCR2.bit.EPWM2 = 1;   // 使能ePWM2时钟
    CpuSysRegs.PCLKCR2.bit.EPWM3 = 1;   // 使能ePWM3时钟

    // 配置PWM计数器
    EPwm1Regs.TBCTL.bit.CTRMODE = 0b10; // up-down计数模式
    EPwm1Regs.TBCTL.bit.PHSEN = 1;      // 使能相位补偿
    EPwm1Regs.TBCTL.bit.PRDLD = 1;      // Period Shadow寄存器加载
    EPwm1Regs.TBCTL.bit.SYNCOSEL = 0b110;// SYNCI作为同步输入信号
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;  // 高速时钟不分频
    EPwm1Regs.TBCTL.bit.CLKDIV = 0;     // 时钟不分频

    // 配置PWM周期
    EPwm1Regs.TBPRD = PWM_PERIOD - 1;

    // 配置PWM相位
    EPwm1Regs.TBPHS.bit.TBPHS = 0;

    // 配置PWM占空比
    EPwm1Regs.CMPA.bit.CMPA = DUTY_CYCLE;

    // 配置PWM死区时间
    EPwm1Regs.DBCTL.bit.OUT_MODE = 0b11;// EPWMxA和EPWMxB都有死区时间
    EPwm1Regs.DBCTL.bit.POLSEL = 0b10;  // EPWMxB取反
    EPwm1Regs.DBCTL.bit.IN_MODE = 0;    // 死区时间由逻辑单元生成
    EPwm1Regs.DBRED.bit.DBRED = 100;    // 死区时间为100ns
    EPwm1Regs.DBFED.bit.DBFED = 100;    // 死区时间为100ns

    // 配置PWM事件触发
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     // 使能SOCA事件
    EPwm1Regs.ETSEL.bit.SOCASEL = 0b001;// 产生SOCA事件时，计数器为零
    EPwm1Regs.ETPS.bit.SOCAPRD = 0b01;  // SOCA事件周期为每个PWM周期

    // 启动PWM计数器
    EPwm1Regs.TBCTL.bit.CTRMODE = 0b10; // up-down计数模式

    // 配置PWM2和PWM3
    EPwm2Regs.TBCTL.all = EPwm1Regs.TBCTL.all;
    EPwm2Regs.TBPRD = EPwm1Regs.TBPRD;
    EPwm2Regs.TBPHS.all = EPwm1Regs.TBPHS.all;
    EPwm2Regs.CMPA.all = EPwm1Regs.CMPA.all;
    EPwm2Regs.DBCTL.all = EPwm1Regs.DBCTL.all;
    EPwm2Regs.DBRED.all = EPwm1Regs.DBRED.all;
    EPwm2Regs.DBFED.all = EPwm1Regs.DBFED.all;
    EPwm2Regs.ETSEL.all = EPwm1Regs.ETSEL.all;
    EPwm2Regs.ETPS.all = EPwm1Regs.ETPS.all;
    EPwm2Regs.TBCTL.bit.CTRMODE = 0b10;

    EPwm3Regs.TBCTL.all = EPwm1Regs.TBCTL.all;
    EPwm3Regs.TBPRD = EPwm1Regs.TBPRD;
    EPwm3Regs.TBPHS.all = EPwm1Regs.TBPHS.all;
    EPwm3Regs.CMPA.all = EPwm1Regs.CMPA.all;
    EPwm3Regs.DBCTL.all = EPwm1Regs.DBCTL.all;
    EPwm3Regs.DBRED.all = EPwm1Regs.DBRED.all;
    EPwm3Regs.DBFED.all = EPwm1Regs.DBFED.all;
    EPwm3Regs.ETSEL.all = EPwm1Regs.ETSEL.all;
    EPwm3Regs.ETPS.all = EPwm1Regs.ETPS.all;
    EPwm3Regs.TBCTL.bit.CTRMODE = 0b10;
}

该代码通过配置ePWM模块的计数器、PWM周期、占空比、相位、死区时间、事件触发等参数，实现了三相全桥逆变电路的发波控制。其中，PWM周期为1ms，占空比为50%，载波频率为10kHz。需要注意的是，该代码中只提供了ePWM模块的初始化函数InitEPwm()，如果需要进一步完善三相全桥逆变电路的发波控制，还需要根据具体电路参数进行计算和调整。

dsp28335epwm互补带死区 DEMO

以下是DSP28335 EPWM模块互补带死区的一个简单DEMO示例：

#include "DSP2833x_Device.h"
#include "DSP2833x_Examples.h"

void InitEPwm1(void);
void InitEPwm2(void);
void InitEPwm3(void);

void main(void)
{
    InitSysCtrl();

    DINT;

    InitPieCtrl();

    IER = 0x0000;
    IFR = 0x0000;

    InitPieVectTable();

    InitEPwm1();
    InitEPwm2();
    InitEPwm3();

    EINT;

    ERTM;

    while(1);
}

void InitEPwm1(void)
{
    EPwm1Regs.TBPRD = 600;     // Set period to 600 TBCLK counts
    EPwm1Regs.TBPHS.bit.TBPHS = 0;   // Phase is 0
    EPwm1Regs.TBCTR = 0;       // Clear counter

    EPwm1Regs.CMPA.half.CMPA = 300;  // Set duty cycle to 50%
    EPwm1Regs.CMPB = 300;      // Set duty cycle to 50%

    EPwm1Regs.AQCTLA.bit.PRD = AQ_SET;   // Set PWM1A on period
    EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;    // Clear PWM1A on CMPA up
    EPwm1Regs.AQCTLB.bit.PRD = AQ_SET;   // Set PWM1B on period
    EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;    // Clear PWM1B on CMPB up

    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // Enable dead-band
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;    // Active high complementary
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;   // EPWMxA is source for both falling/rising edge delay
    EPwm1Regs.DBRED = 50;       // Falling edge delay = 50 TBCLKs
    EPwm1Regs.DBFED = 50;       // Rising edge delay = 50 TBCLKs

    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;   // Count up
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;  // Disable phase loading
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;   // Clock ratio to SYSCLKOUT
}

void InitEPwm2(void)
{
    EPwm2Regs.TBPRD = 600;     // Set period to 600 TBCLK counts
    EPwm2Regs.TBPHS.bit.TBPHS = 0;   // Phase is 0
    EPwm2Regs.TBCTR = 0;       // Clear counter

    EPwm2Regs.CMPA.half.CMPA = 300;  // Set duty cycle to 50%
    EPwm2Regs.CMPB = 300;      // Set duty cycle to 50%

    EPwm2Regs.AQCTLA.bit.PRD = AQ_SET;   // Set PWM2A on period
    EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;    // Clear PWM2A on CMPA up
    EPwm2Regs.AQCTLB.bit.PRD = AQ_SET;   // Set PWM2B on period
    EPwm2Regs.AQCTLB.bit.CBU = AQ_CLEAR;    // Clear PWM2B on CMPB up

    EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // Enable dead-band
    EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;    // Active high complementary
    EPwm2Regs.DBCTL.bit.IN_MODE = DBA_ALL;   // EPWMxA is source for both falling/rising edge delay
    EPwm2Regs.DBRED = 50;       // Falling edge delay = 50 TBCLKs
    EPwm2Regs.DBFED = 50;       // Rising edge delay = 50 TBCLKs

    EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;   // Count up
    EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;  // Disable phase loading
    EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
    EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;   // Clock ratio to SYSCLKOUT
}

void InitEPwm3(void)
{
    EPwm3Regs.TBPRD = 600;     // Set period to 600 TBCLK counts
    EPwm3Regs.TBPHS.bit.TBPHS = 0;   // Phase is 0
    EPwm3Regs.TBCTR = 0;       // Clear counter

    EPwm3Regs.CMPA.half.CMPA = 300;  // Set duty cycle to 50%
    EPwm3Regs.CMPB = 300;      // Set duty cycle to 50%

    EPwm3Regs.AQCTLA.bit.PRD = AQ_SET;   // Set PWM3A on period
    EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;    // Clear PWM3A on CMPA up
    EPwm3Regs.AQCTLB.bit.PRD = AQ_SET;   // Set PWM3B on period
    EPwm3Regs.AQCTLB.bit.CBU = AQ_CLEAR;    // Clear PWM3B on CMPB up

    EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // Enable dead-band
    EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;    // Active high complementary
    EPwm3Regs.DBCTL.bit.IN_MODE = DBA_ALL;   // EPWMxA is source for both falling/rising edge delay
    EPwm3Regs.DBRED = 50;       // Falling edge delay = 50 TBCLKs
    EPwm3Regs.DBFED = 50;       // Rising edge delay = 50 TBCLKs

    EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;   // Count up
    EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;  // Disable phase loading
    EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
    EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;   // Clock ratio to SYSCLKOUT
}

该示例通过初始化三个EPWM模块来实现互补带死区输出。在每个EPWM模块中，设置了一个周期为600 TBCLK计数的PWM信号，并且通过设置相应的寄存器来启用互补模式和带死区功能。其中，`EPwm1Regs`、`EPwm2Regs`、`EPwm3Regs`分别表示三个EPWM模块的寄存器组。