![](https://csdnimg.cn/release/download_crawler_static/10487958/bg11.jpg)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
[SKL PDG]Close AB19,
Placement type:Edge<10mm(394mil)
[SKL PDG]1uF x1
Primary Well 1.0 V: For I/O blocks, ungated ISH SRAM
power, USB AFE Digital Logic, JTAG, Thermal Sensor and
MIPI DPHY.
SRAM Primary Well 1.0 V. Dedicated SRAM rail and can
have on board power down gate control.
[SKL PDG]1uF x1
[SKL PDG]Close AF20,
Placement type:Edge<10mm(394mil)
[SKL PDG]1uF x1
[SKL PDG]Close N18,
Placement type:Edge<3mm(118mil)
Core Logic Primary Well: This rail scales from 0.85 V
to 1.0 V.
[SKL PDG]1uF x1
[SKL PDG]Close AF18,
Placement type:Edge<10mm(394mil)
Primary Well 3.3 V
[SKL PDG]1uF x1
[SKL PDG]Close V19,
Placement type:Edge<3mm(118mil)
HD Audio Power 3.3 V, 1.8 V, 1.5 V. For Intel High
Definition Audio.
[SKL PDG]1uF x1
[SKL PDG]Close AJ19,
Placement type:Edge<10mm(394mil)
[SKL PDG]VCCPRIM
[SKL PDG]VccSRAM
[SKL PDG]VccAPLLEBB
[SKL PDG]VccPRIM_Core
[SKL PDG]VCCPRIM [SKL PDG]VccHDA
Mod PHY Always On Primary 1.0 V: Always on primary
supply for PCIe/DMI/USB3/SATA/MIPI MPHY logic
[SKL PDG]1uF x1
[SKL PDG]Close K17,
Placement type:Edge<3mm(118mil)
[SKL PDG]VccMPHYAON
[SKL PDG]1uF x1
[SKL PDG]Close AK19,
Placement type:Edge<3mm(118mil)
RTC Logic Primary Well 3.3 V. This power supplies
the RTC internal VRM. It will be off during Deep
Sx mode.
Thermal Sensor Primary Well 1.8 V
[SKL PDG]VccATS [SKL PDG]DcpDSW [SKL PDG]DcpRTC
[SKL PDG]VccRTC
[SKL PDG]1uF x1
[SKL PDG]Close AA1,
Placement type:Edge<10mm(394mil)
RTC de-coupling capacitor only. This rail should NOT
be driven.
[SKL PDG]0.1uF x1
[SKL PDG]Close BB10,
Placement type:Edge<3mm(118mil)
Deep Sx Well 1.0 V: This rail is generated by on die DSW
low dropout (LDO) linear voltage regulator to supply DSW
GPIOs, DSW core logic and DSW USB2 logic. Board needs to
connect 1 uF capacitor to this rail and power should NOT
be driven from the board. When primary well power is up,
this rail is bypassed from VCCPRIM_1p0.
[SKL PDG]1uF x1
[SKL PDG]Close AL1,
Placement type:Edge<3mm(118mil)
[SKL PDG]1uF x1
VccMPHYGT(Mod PHY Externally Gated Primary 1.0 V: Externally gated
primary supply for PCIe/DMI/USB3/SATA/MIPI MPHY logic.)
[SKL PDG]Close N15,
Placement type:Edge<3mm(118mil)
[SKL PDG]47uF x1
[SKL PDG]VccMPHYGT
[SKL PDG]Close N15,
Placement type:Edge<10mm(394mil)
[SKL PDG]1uF x1,0.1uF x2
[SKL PDG]Close AK17,
Placement type:Edge<3mm(118mil)
RTC Logic Primary Well 3.3 V. This power supplies the RTC
internal VRM. It will be off during Deep Sx mode.
[SKL PDG]VccRTCPRIM
85mA
135mA
88mA
33mA
26mA
22mA
1500mA
1100mA
600mA
565mA
75mA
33mA
118mA
68mA
Reserve for Sense Resistor
161mA
[SKL PDG]VccDSW
Deep Sx Well for GPD GPIOs and USB2
CC143 please close to AB19
CC137 please close to K17
CC136 please close to AF20
CC132 please close to N18
CC133 & CC134 please close to N15
please close to AG15 , Y16 & T16
+1VALW_PLL
+VCC_AMPHYPLL
+DCPRTC
+DCPDSW
+DCPRTC
+DCPDSW
+VCC_AMPHYPLL
+1VALW_PLL
+VCC_AMPHYPLL
+1VALW_PCH
+VCC_MPHYGT
+VCC_MPHYGT
+PCH_CORE
+3VALW_PCH
+3VALW_PRIM +VCC_HDA
+3VALW_PCH
+1VALW
+1VALW +VCC_MPHYGT
+1VALW_PCH
+1VALW_PCH
+RTCVCC
+1.8VALW_PCH
+VCC_MPHYGT
+3VALW_PCH
+3VALW_RTCPRIM
+3VALW_PCH
+1.8VALW +1.8VALW_PCH
+3VALW +3VALW_PCH
+1VALW +1VALW_PCH
+1.8VALW_PCH
+3VALW_PCH +VCC_DSW3P3
+1VALW_PCH
+VCC_MPHYGT
+1VALW_PCH
+PCH_CORE
+VCC_MPHYGT
+VCC_DSW3P3
+3VALW_PRIM
+VCC_HDA
+3VALW_PRIM
+1.8VALW_PCH
+3VALW_RTCPRIM
+RTCVCC
+3VALW_PCH
+3V_SPI
Size Document Number Rev
Date: Sheet of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
KENOBI
2.0
KBL(13/16):POWER
A2
17 82
Thursday, August 25, 2016
2015/09/01
2016/12/31
Size Document Number Rev
Date: Sheet of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
KENOBI
2.0
KBL(13/16):POWER
A2
17 82
Thursday, August 25, 2016
2015/09/01
2016/12/31
Size Document Number Rev
Date: Sheet of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
KENOBI
2.0
KBL(13/16):POWER
A2
17 82
Thursday, August 25, 2016
2015/09/01
2016/12/31
CC142
1U_0402_10V6K
1
2
RC139 0_0603_5%
1 2
RC141 0_0805_5%
1 2
CC182
22U_0603_6.3V6-M
1
2
T1
1
CC133
1U_0402_10V6K
1
2
CC134
47U_0805_6.3V6-M
1
2
CC153
0.1U_0402_10V6-K
1
2
CC137
1U_0402_10V6K
1
2
CC131
22U_0603_6.3V6-M
1
2
T2
1
CC152
0.1U_0402_10V6-K
1
2
CC144
1U_0402_10V6K
1
2
RC150 0_0402_5%
@
1 2
CC135
22U_0603_6.3V6-M
1
2
RC152 0_0402_5%
@
1 2
CC147
1U_0402_10V6K
1
2
RC151 0_0805_5%
1 2
RC202 0_0805_5%
1 2
CC181
22U_0603_6.3V6-M
1
2
CC145
1U_0402_10V6K
1
2
CC136
1U_0402_10V6K
@
1
2
RC147 0_0402_5%
@
1 2
RC148 0_0402_5%
@
1 2
RC146 0_0402_5%
1 2
CC148
1U_0402_10V6K
1
2
RC140 0_0805_5%
1 2
CC132
1U_0402_10V6K
1
2
CC151
1U_0402_10V6K
1
2
SKL_ULT
CPU POWER 4 OF 4
??15 OF 20
REV = 1
UC1O
SKYLAKE-U_BGA1356
@
GPP_B0/CORE_VID0
AN11
GPP_B1/CORE_VID1
AN13
VCCCLK1
A14
VCCCLK6
A10
VCCAMPHYPLL_1P0_K15
K15
VCCAMPHYPLL_1P0_L15
L15
VCCAPLL_1P0
V15
VCCAPLLEBB
N18
VCCATS_1P8
AA1
DCPDSW_1P0
AL1
VCCPRIM_1P0_T1
T1
VCCPRIM_1P0_AB17
AB17
VCCPRIM_1P0_Y18
Y18
VCCCLK2
K19
VCCCLK4
N20
VCCCLK3
L21
VCCCLK5
L19
VCCPRIM_1P0_AK20
AK20
VCCMPHYAON_1P0_K17
K17
VCCMPHYAON_1P0_L1
L1
VCCMPHYGT_1P0_N15
N15
VCCMPHYGT_1P0_N16
N16
VCCMPHYGT_1P0_N17
N17
VCCMPHYGT_1P0_P15
P15
VCCMPHYGT_1P0_P16
P16
VCCHDA
AJ19
VCCDSW_3P3_AD17
AD17
VCCDSW_3P3_AD18
AD18
VCCDSW_3P3_AJ17
AJ17
VCCPRIM_3P3_AJ21
AJ21
VCCPGPPA
AK15
VCCPGPPB
AG15
VCCPGPPC
Y16
VCCPGPPD
Y15
VCCPGPPE
T16
VCCPGPPF
AF16
VCCPGPPG
AD15
VCCPRIM_3P3_V19
V19
VCCPRIM_1P0_AB19
AB19
VCCPRIM_1P0_AB20
AB20
VCCPRIM_1P0_P18
P18
VCCPRIM_CORE_AF18
AF18
VCCPRIM_CORE_AF19
AF19
VCCPRIM_CORE_V20
V20
VCCPRIM_CORE_V21
V21
VCCRTC_AK19
AK19
VCCRTC_BB14
BB14
VCCRTCPRIM_3P3
AK17
VCCSPI
AJ16
DCPRTC
BB10
VCCSRAM_1P0_AF20
AF20
VCCSRAM_1P0_AF21
AF21
VCCSRAM_1P0_T19
T19
VCCSRAM_1P0_T20
T20
CC146
0.1U_0402_10V6-K
1
2
CC154
1U_0402_10V6K
1
2
CC149
1U_0402_10V6K
@
1
2
CC140
1U_0402_10V6K
1
2
CC143
1U_0402_10V6K
1
2
RC145 0_0402_5%
1 2
CC141
1U_0402_10V6K
1
2
CC150
1U_0402_10V6K
1
2