ZCC7331
Voltage Clamping Circuit
The ZCC7331 provides a voltage clamping circuit at
DMAG pin since the voltage on the auxiliary winding is
negative when the main switch is turned on. The lowest
voltage on DMAG pin is clamped near zero to prevent
the IC from being damaged by the negative voltage.
Meanwhile, the sourcing DMAG current (I
DMAG
),
flowing through the upper resistor (R
DMAG1
), is
sampled and held to be a line-voltage-related signal for
propagation delay compensation. The ZCC7331 embeds
the programmable propagation delay compensation
through CS pin. A sourcing current I
CS
(equal to I
DMAG
x K
PC
) applies a voltage offset (I
CS
x R
PC
) which is
propoZCCional to line voltage on CS to compensate the
propagation delay effect. Thus, the output current can
be equal at high and low line voltage.
V
IN
Input Voltage
I
L_PK
Peak Inductor Current
MOSFET Current
I
Q1_DS
I
in_avg
I
Do
Average Input Current
Output Diode Current
MOSFET Gate Voltage
V
Q1_GS
Figure 2. Inductor Current of CRM with Constant
On-Time Control
Quasi-Resonant Operation
The ZCC7331 needs no shunt regulator and
opto-coupler at the secondary side to achieve the
output current regulation. Figure 3 shows several key
waveforms of a conventional flyback conveZCCer in
Quasi-Resonant (QR) mode, in which V
AUX
is the
voltage on the auxiliary winding of the transformer.
Figure 4 illustrates how valley signal triggers PWM. If
no valley signal detected for a long time, the next PWM
is triggered by a staZCCer circuit at the end of the interval
(t
STAZCC
, 127.5s typ.). A blanking time (t
S(MIN)
, 8.5μs
typ.), which staZCCs at the rising edge of the previous
PWM signal, limits minimum switching period. When
the t
S(MIN)
interval is on-going, all of valley signals are
not allowed to trigger the next PWM signal. After the
end of the t
S(MIN)
interval, the coming valley will trigger
the next PWM signal. If one or more valley signals are
detected during the t
S(MIN)
interval and no valley is
detected after the end of the tS(MIN) interval, the next
PWM signal will be triggered automatically at the end of
the t
S(MIN)
+ 5s (typ.).
V
DS
V
IN
0
GD
(V
GS
)
(V
OUT
+ V
f
) x N
aux
/ N
S
V
AUX
0
V
IN
x N
aux
/ N
P
Clamped by Controller
I
Q1
I
DOUT
Figure 3. Key Waveforms of a Flyback ConveZCCer
www.zcc-china.cn
4
September 2018
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