mtlo $t1
Move to LO register Set LO to contents of $t1 (see multiply and divide operations)
mul $t1,$t2,$t3
Multiplication without overflow Set HI to high-order 32 bits, LO and $t1 to low-order 32 bits of the
product of $t2 and $t3 (use mfhi to access HI, mflo to access LO)
mul.d $f2,$f4,$f6
Floating point multiplication double
precision
Set $f2 to double-precision floating point value of $f4 times $f6
mul.s $f0,$f1,$f3
Floating point multiplication single
precision
Set $f0 to single-precision floating point value of $f1 times $f3
mult $t1,$t2
Multiplication Set hi to high-order 32 bits, lo to low-order 32 bits of the product of $t1
and $t2 (use mfhi to access hi, mflo to access lo)
multu $t1,$t2
Multiplication unsigned Set HI to high-order 32 bits, LO to low-order 32 bits of the product of
unsigned $t1 and $t2 (use mfhi to access HI, mflo to access LO)
neg.d $f2,$f4
Floating point negate double precision Set double precision $f2 to negation of double precision value in $f4
neg.s $f0,$f1
Floating point negate single precision Set single precision $f0 to negation of single precision value in $f1
nop
Null operation machine code is all zeroes
nor $t1,$t2,$t3
Bitwise NOR Set $t1 to bitwise NOR of $t2 and $t3
or $t1,$t2,$t3
Bitwise OR Set $t1 to bitwise OR of $t2 and $t3
ori $t1,$t2,100
Bitwise OR immediate Set $t1 to bitwise OR of $t2 and zero-extended 16-bit immediate
round.w.d $f1,$f2
Round double precision to word Set $f1 to 32-bit integer round of double-precision float in $f2
round.w.s $f0,$f1
Round single precision to word Set $f0 to 32-bit integer round of single-precision float in $f1
sb $t1,-100($t2)
Store byte Store the low-order 8 bits of $t1 into the effective memory byte address
sc $t1,-100($t2)
Store conditional Paired with Load Linked (ll) to perform atomic read-modify-write.
Stores $t1 value into effective address, then sets $t1 to 1 for success.
Always succeeds because MARS does not simulate multiple processors.
sdc1 $f2,-100($t2)
Store double word from Coprocessor 1
(FPU))
Store 64 bit value in $f2 to effective memory doubleword address
sh $t1,-100($t2)
Store halfword Store the low-order 16 bits of $t1 into the effective memory halfword
address
sll $t1,$t2,10
Shift left logical Set $t1 to result of shifting $t2 left by number of bits specified by
immediate
sllv $t1,$t2,$t3
Shift left logical variable Set $t1 to result of shifting $t2 left by number of bits specified by value
in low-order 5 bits of $t3
slt $t1,$t2,$t3
Set less than If $t2 is less than $t3, then set $t1 to 1 else set $t1 to 0
slti $t1,$t2,-100
Set less than immediate If $t2 is less than sign-extended 16-bit immediate, then set $t1 to 1 else
set $t1 to 0
sltiu $t1,$t2,-100
Set less than immediate unsigned If $t2 is less than sign-extended 16-bit immediate using unsigned
comparison, then set $t1 to 1 else set $t1 to 0
sltu $t1,$t2,$t3
Set less than unsigned If $t2 is less than $t3 using unsigned comparision, then set $t1 to 1 else
set $t1 to 0
sqrt.d $f2,$f4
Square root double precision Set $f2 to double-precision floating point square root of $f4
sqrt.s $f0,$f1
Square root single precision Set $f0 to single-precision floating point square root of $f1
sra $t1,$t2,10
Shift right arithmetic Set $t1 to result of sign-extended shifting $t2 right by number of bits
specified by immediate
srav $t1,$t2,$t3
Shift right arithmetic variable Set $t1 to result of sign-extended shifting $t2 right by number of bits
specified by value in low-order 5 bits of $t3
srl $t1,$t2,10
Shift right logical Set $t1 to result of shifting $t2 right by number of bits specified by
immediate
srlv $t1,$t2,$t3
Shift right logical variable Set $t1 to result of shifting $t2 right by number of bits specified by value
in low-order 5 bits of $t3
5