GaN器件产品级可靠性实证：硬切换测试方法与应用

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本文档深入探讨了TI LMG3425R050器件的Product-level Reliability，即产品级别的可靠性，对于实现氮化镓(GaN)产品在广泛应用中的广泛接受至关重要。GaN技术因其高效率和高温性能而备受关注，但在推动其广泛应用之前，必须克服产品级别可靠性方面的挑战。首先，作者强调了产品级别可靠性面临的困难，这些困难源于GaN产品的多样化以及使用条件的广泛性。由于不同的产品有着各自的特性和应用场景，传统的系统级加速方法可能不足以全面评估所有可能的故障情况。此外，由于非GaN系统的故障也可能影响整体设备的表现，这就增加了评估的复杂性。针对电源管理应用，特别是像LMG3425R050这样的开关器件，作者提出可以通过识别基本的开关过渡来确保产品可靠性。在硬开关操作模式下，这种转换可以被视为一种关键的质量控制指标，因为它直接反映了器件在实际工作中的行为。通过这种方法，产品可以在与实际应用环境更紧密相关的条件下进行验证。论文进一步阐述了如何利用熟悉的双脉冲测试器作为硬开关资格测试工具，这种测试方法是基于硅晶体管现有资格框架的基础上发展起来的。双脉冲测试通过施加特定的电压和电流波形，模拟设备在实际工作中的开关活动，以此来评估器件在极端条件下的耐久性。本文旨在提供一种实用的、针对GaN器件如LMG3425R050进行产品级别可靠性的评估方法，这对于推动GaN技术在电力转换和功率晶体管领域的广泛应用具有重要意义。通过理解和执行这种严格的测试策略，制造商能够增强客户对GaN产品的信心，并推动其在高压、高温和高频应用中的广泛应用。同时，这也为整个半导体行业的可靠性标准制定提供了有价值的经验和参考。

Product-level Reliability of GaN Devices

Sandeep R. Bahl, Daniel Ruiz and Dong Seup Lee*

Texas Instruments

2900 Semiconductor Dr. Santa Clara, CA 95052

*13121 TI Blvd, Dallas, TX 75243

Abstract—To enable the widespread adoption of GaN products,

the industry needs to be convinced of product-level reliability.

The difficulty with product-level reliability lies with the diverse

range of products and use conditions, a limited ability for

system-level acceleration, and the complication from non-GaN

system failures. For power management applications, however,

it is possible to identify fundamental switching transitions. This

allows the device to be qualified in an application-relevant

manner. In this paper, we explain how hard-switching can form

a fundamental switching transition for power management

products. We further show that the familiar double-pulse tester

is a good hard-switching qualification test vehicle. The

methodology is explained in the context of the existing

qualification framework for silicon transistors.

Index Terms—Gallium nitride, life testing, power conversion,

power transistors, semiconductor device reliability

I. INTRODUCTION

The industry now takes the reliability of silicon transistors

for granted, as evidenced by their widespread use in products.

This is a result, not only of longstanding experience, but also

of the development of credible reliability and qualification

methodology. Technology is qualified by running

standardized stress tests [1]-[3], and by validating lifetime

requirements [4]. This methodology originated from detailed

work on the understanding of failure modes, their acceleration

and modeling, and a statistical framework to assure a

minimum level of quality.

The stress tests, however, were developed more than

twenty years ago, with the Joint Electron Device Engineering

Council (JEDEC) JESD47 document released in 1995 and the

Automotive Electronics Council (AEC) founded in 1994. The

qualification procedure has remained essentially unchanged

over the years, whereas technology and its uses have changed.

For example, power conversion circuitry using hard-switched

transistors is now much more widespread. There is also

tremendous interest in emerging materials like GaN and SiC

for power management applications.

Transistors from emerging materials are being judged as

“passing qual” when run through the standardized stress tests

described in [1]-[3]. While the standard silicon-based

qualification recipe is a worthy manufacturing, quality and

reliability milestone, it is not clear what it means for emerging

transistors in terms of device lifetime, failure rates and

application-relevance. This is because the failure modes,

activation energies, and acceleration factors are likely to be

different than those used for Si. In addition, the reliability test

conditions may not be representative of the product use-case

so may not accelerate valid failure mechanisms.

For successful technology adoption, it is important to

develop credible reliability and qualification methodology. A

successful methodology allows the industry to gain confidence

that parts will last for the desired lifetime in the end-use

application without many customer returns. It also allows

users to easily benchmark components and suppliers.

II. WHAT DOES QUALIFICATION MEAN?

Traditional qualification testing [1]-[3] or “qual” involves

many tests, which may be classified into three categories:

device, package, and electrostatic discharge (ESD). In this

paper, we focus on device-relevant testing. In order for the

industry to develop GaN-specific methodology, it is important

to understand the fundamentals and assumptions behind

traditional qualification. It is also important to know what

“passing qual” means. The knowledge may be summarized in

the form of the three questions below:

A. How long is the device qualified for?

This is typically perceived to be 10 years

. The calculation

arises by running a 1000h test at a junction temperature of

125°C and extrapolating to a use-temperature of 55°C with an

activation energy of 0.7 eV. Additionally, discrete FETs are

commonly qualified at 80% of the minimum breakdown

voltage, e.g. a 600V FET is qualified at 480V. The 80% value

is common practice and not specified by present standards

†

The ten-year assumption falls apart for power FETs, even

those made from Si. Several scenarios are calculated in [6].

The typical use-temperature of power FETs is about 100-

110°C. If qualification is run at 150°C, then the non-

accelerated time for use at 105°C is only 1.1 yrs, far short of a

ten year lifetime. Further, thermal acceleration for silicon

assumes an activation energy of 0.7 eV, whereas activation

energies for GaN are likely to be different. Recent power GaN

literature shows a wide range [7]-[13], from 0.1 eV to 1.84

eV. Voltage acceleration is also used [11],[14]. The variation

is expected, due to different failure modes and architectures.

Indeed, power GaN transistors comprise both depletion and

enhancement mode (d- and e-mode) FETs. Further, d-mode

FETs are Schottky [9] or Insulated-gate [12] and are either

cascoded with a low-voltage Si FET [12] or an IC [15] for

The traditional calculation results in nine years [1].

†

The current documentation [3] specifies qualification at the maximum rated

DC reverse voltage. An 80% criteria exists in historical documentation [5]

reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any

copyrighted component of this work in other works.

Presented at the IEEE International Reliability Physics Symposium (IRPS), Apr. 2016. (Invited paper)

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