![](https://csdnimg.cn/release/download_crawler_static/15434549/bgc.jpg)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
12
PCH SPI ROM(CLG)
PCH SPI ROM(CLG)
TP66-71 need place to TOP
AKE3DZN0N01
GigaDevice
Winbond 16MB
Socket
Vender P/N
DFHS08FS023
Size
EON
4M SPI ROM Socket
U2003&U2004 footprint must overlap
PCH Strap Pin
TOP SWAP OVERRIDE STRAP
HIGH:TOP SWAP
ENABLED (CRB)
LOW:TOP SWAP
DISABLED(DEFAULT)
NO REBOOT IF SAMPLED HIGH
TLS CONFIDENTIALITY ENABLED
LOW: Disable Intel ME Crypto Transport
Layer Security
(TLS) cipher suite (no confidentiality). (Default)
HIGH:Enable No Reboot mode.
This function is useful when running
ITP/XDP.
LOW: Disable "No Reboot"
mode. (Default)
HIGH:T Enable Intel ME Crypto Transport
Layer Security
(TLS) cipher suite (with confidentiality). (CRB)
HIGH:LPC
LOW: SPI.
(Default)
BOOT SELECT STRAP
HIGH:eSPI Is selected for EC.
LOW: LPC Is selected for EC.
(Default)
ESPI/LPC SELECT STRAP
This strap should
sample HIGH.
There should NOT be any
on-board device
driving it to opposite
direction during
strap sampling.
This strap should
sample HIGH.
There should NOT be any
on-board device
driving it to opposite
direction during
strap sampling.
RESERVED
RESERVED
This strap should
sample LOW.
There should NOT be any
on-board device
driving it to opposite
direction during
strap sampling.
RESERVED
This strap should
sample HIGH.
There should NOT be any
on-board device
driving it to opposite
direction during
strap sampling.
RESERVED
This strap should
sample HIGH.
There should NOT be any
on-board device
driving it to opposite
direction during
strap sampling.
RESERVED
LOW: 0: MASTER ATTACHED
FLASH SHARING
HIGH:SLAVE ATTACEHD
FLASH SHARING
ESPI FLASH SHARING MODE
This strap should
sample LOW.
There should NOT be any
on-board device
driving it to opposite
direction during
strap sampling.
DFX TEST MODE QUALIFIER FOR OTHER
DFX STRAP
WHEN SAMPLED
LOW
LOW: security measures defined in the Flash
Descriptor. (Default)
TLS CONFIDENTIALITY ENABLED
HIGH: Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.(CRB)
EC-A-03
EC-A-11
EC-B-16
PCH_SPI1_SI
PCH_SPI1_CLK
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
PCH_SPI1_SO
SM_INTRUDER#
PCH_SPI_IO3
BIOS_WP#
PCH_SPI1_SI_R
PCH_SPI1_CLK_R
PCH_SPI_CS0#_R
HOLD#
BIOS_WP#
PCH_SPI1_SO_R
+3VSPI
+3VSPI
PCH_SPI_CS0#_R
PCH_SPI1_SO_R
PCH_SPI_CS0#_R
HOLD#
BIOS_WP#
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_CLK_R
PCH_SPI_CS0#
PCH_SPI1_SO_RPCH_SPI1_SO
PCH_SPI_IO2
HOLD#
PCH_SPI1_SI_RPCH_SPI1_SI
PCH_SPI1_CLK
SMB_ME3_DAT
SMB_ME3_CLK
SMB_ME2_DAT
SMB_ME2_CLK
SMB_ME4_CLK
SMB_ME4_DAT
SML4ALERT#
SMB_ME3_CLK
SMB_ME3_DAT
SML3ALERT#
SMB_ME2_CLK
SMB_ME2_DAT
SML2ALERT#
SMB_ME4_DAT
SMB_ME4_CLK
PCI_PME#
ACZ_SPKR
BBS_BIT1
SML0ALERT#
S_GPIO
DRAMRST_CNTRL_PCH
PCH_SPI1_SI
PCH_SPI1_SO
SML1ALERT#_R
PCH_SPI_IO2
PCH_SPI_IO3
SML2ALERT#
PGDMON
TEMP_ALERT#
ACZ_SDOUT
PCI_PLTRST#
PCH_SPI_CS0#_R(32)
PCH_SPI1_CLK_R(32)
PCH_SPI1_SI_R(32)
PCH_SPI1_SO_R(32)
ACZ_SPKR(10,21)
BBS_BIT1(13)
SML0ALERT#(10)
S_GPIO(13)
DRAMRST_CNTRL_PCH(10)
SML1ALERT#_R(10)
PGDMON(15)
TEMP_ALERT# (30)
ACZ_SDOUT(10)
PLTRST# (2,23,24,25,26,29,30,32,53)
+3V_RTC
+3V_DEEP_SUS
+3VSPI
+3V_S5
+3V_DEEP_SUS
+3V
+3V
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V
+3V_DEEP_SUS
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
PCH 4/6 (GPIO/MISC)
2A
Custom
12 68Thursday, August 25, 2016
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
PCH 4/6 (GPIO/MISC)
2A
Custom
12 68Thursday, August 25, 2016
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
PCH 4/6 (GPIO/MISC)
2A
Custom
12 68Thursday, August 25, 2016
R676
20K/F_4 R584
*1K_4
TP61
R283
*1K_4
R342
4.7K_4
U54
*A25LQ32AM-F/Q
DFHS08FS023
91960-0084L-8P-SOCKET
CE#
1
SCK
6
SI
5
SO
2
WP#
3
VDD
8
VSS
4
HOLD#
7
R699
*20K/F_4
R298
*20K/F_4
R299
*4.7K_4
R355 1K_4
R697 *0_4/S
SPT-H_PCH
1 OF 12
U50A
SPT_PCH_H
INTRUDER#
BE11
GPP_H10/SML2CLK
BD34
GPP_H11/SML2DATA
AW35
GPP_H12/SML2ALERT#
BD35
GPP_H13/SML3CLK
BC35
GPP_H14/SML3DATA
BA35
GPP_H15/SML3ALERT#
BB36
GPP_H16/SML4CLK
BD39
GPP_H17/SML4DATA
BE34
GPP_H18/SML4ALERT#
BC36
GPP_B4/CPU_GP3
BD24
GPP_B3/CPU_GP2
BC23
GPP_E7/CPU_GP1
AE44
GPP_E3/CPU_GP0
AF41
GPP_G14/GSXDIN
R42
GPP_G13/GSXSLOAD
R36
GPP_G12/GSXDOUT
R39
GPP_G16/GSXCLK
P43
GPP_B13/PLTRST#
BB27
GPP_D21/SPI1_IO2
AG44
GPP_D22/SPI1_IO3
AH43
GPP_D2/SPI1_MISO
AN38
GPP_D3/SPI1_MOSI
AN41
GPP_D0/SPI1_CS#
AL39
GPP_D1/SPI1_CLK
AN36
SPI0_CS2#
AT31
SPI0_IO3
BD30
SPI0_IO2
BC29
SPI0_CS1#
AW31
SPI0_CLK
BC31
SPI0_CS0#
BD31
SPI0_MISO
BE30
SPI0_MOSI
BB29
TP1
AN17
TP2
AR19
RSVD
AE17
RSVD
AF17
RSVD
AG14
RSVD
AG15
GPP_A11/PME#
BD17
GPP_G15/GSXSRESET#
R41
R373 15/F_4
R323
*4.7K_4
R661
*150K/F_4
R694 *0_4
R377
100K_4
U53
GD25B64BSIGR
CE#
1
SCK
6
SI
5
SO
2
WP#
3
VDD
8
VSS
4
HOLD#
7
TP96
R380 *0_4
R297
*4.7K_4
R690
*20K/F_4
R316 499/F_4
R696 499/F_4
R343
*4.7K_4
R660
20K/F_4
R698 499/F_4
R301
20K/F_4
R712 499/F_4
R6431M_4
R693 499/F_4
C686
0.1U/10V_4
R674
*4.7K_4
R587
1K_4
R372 15/F_4
R678 1K_4
R671 15/F_4
R317 499/F_4
TP97
R691
*4.7K_4
R700
*4.7K_4
U22
MC74VHC1G08DFT2G
2
1
4
3 5
R360 15/F_4
TP100
TP60
R679 15/F_4
TP98
R688
*20K/F_4
R687
*20K/F_4
R677 15/F_4
C679
22P/50V_4
R672
100_4
R673
*4.7K_4
TP62
R689
*20K/F_4
TP95
C981
0.1U/16V_4
C979 1U/10V_4
R675
*4.7K_4
R664 *10K_4
R282
*1K_4
TP99
R322
*20K/F_4