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EREF: A Programmer’s Reference Manual for Freescale Power Architecture Processors, Rev. 1 (EIS 2.1)
xvi Freescale Semiconductor
Contents
Paragraph
Number Title
Page
Number
7.5.10.2.1 Virtualization Fault Exceptions <E.HV>........................................................... 7-85
7.5.10.2.2 Page Table Fault Exceptions <E.PT> ................................................................ 7-85
7.5.10.2.3 Instruction Storage Interrupt Settings ................................................................ 7-86
7.5.10.2.4 Data Storage Interrupt Settings.......................................................................... 7-86
7.5.10.3 MAS Register Updates for Exceptions, tlbsx, and tlbre....................................... 7-87
7.5.10.4 LRAT Error Exception and Interrupt <E.HV.LRAT>............................................ 7-91
7.5.11 MMU Configuration Information.............................................................................. 7-91
Chapter 8
Interrupts and Exceptions
8.1 Overview.......................................................................................................................... 8-1
8.2 Interrupt Classes .............................................................................................................. 8-2
8.2.1 Recoverability from Interrupts..................................................................................... 8-2
8.3 Interrupt Registers............................................................................................................ 8-3
8.3.1 Save/Restore Registers ................................................................................................ 8-5
8.3.2 Other Registers that Help Service the Interrupt........................................................... 8-6
8.4 Directed Interrupts <E.HV> ............................................................................................ 8-7
8.5 Exceptions........................................................................................................................ 8-8
8.6 Synchronous and Asynchronous Interrupts ................................................................... 8-10
8.6.1 Requirements for System Reset Generation .............................................................. 8-11
8.7 Interrupt Processing ....................................................................................................... 8-11
8.8 Interrupt Definitions ...................................................................................................... 8-13
8.8.1 Critical Input Interrupt............................................................................................... 8-18
8.8.2 Machine Check, NMI, and Error Report Interrupts................................................... 8-19
8.8.2.1 General Machine Check, Error Report, and NMI Mechanism.............................. 8-19
8.8.2.1.1 Error Detection and Reporting Overview.......................................................... 8-20
8.8.2.1.2 Machine Check and Non-Maskable Interrupts Considerations......................... 8-21
8.8.2.2 NMI Interrupts ....................................................................................................... 8-22
8.8.2.3 Error Report Synchronous Interrupts..................................................................... 8-22
8.8.2.4 Asynchronous Machine Check Interrupts ............................................................. 8-23
8.8.3 Data Storage Interrupt................................................................................................ 8-23
8.8.4 Instruction Storage Interrupt ...................................................................................... 8-27
8.8.5 External Input Interrupt ............................................................................................. 8-30
8.8.5.1 External Proxy <EXP> .......................................................................................... 8-31
8.8.6 Alignment Interrupt ................................................................................................... 8-32
8.8.7 Program Interrupt....................................................................................................... 8-33
8.8.8 Floating-Point Unavailable Interrupt <FP> ............................................................... 8-35
8.8.9 System Call Interrupt ................................................................................................. 8-35
8.8.10 Decrementer Interrupt................................................................................................ 8-36
8.8.11 Fixed-Interval Timer Interrupt ................................................................................... 8-37