____________________________________________________________________________________________________________________
CONFIDENTIAL
16
e•MMC
™
& DRAM Specification
Table 7 – H/W Reset Timing Parameters
Symbol
Comment
Min
Max
Unit
tRSTW
RST_n pulse width
1
[us]
tRSCA
RST_n to Command time
200
1
[us]
tRSTH
RST_n high period (interval time)
1
[us]
Note1：74 cycles of clock signal required before issuing CMD1 or CMD0 with argument 0xFFFFFFFA
4.15 Noise Filtering Timing for H/W Reset
Device must filter out 5ns or less pulse width for noise immunity
Device must not detect these rising edge
Figure 4 – Noise Filtering Timing for H/W Reset
Device must not detect 5ns or less of positive or negative RST_n pulse. Device must detect more than
or equal to 1us of positive or negative RST_n pulse width.
4.16 Field Firmware Update(FFU)
Field Firmware Updates (FFU) enables features enhancement in the field. Using this mechanism
the host downloads a new version of the firmware to the e.MMC device and, following a successful
download, instructs the e.MMC device to install the new downloaded firmware into the device.
In order to start the FFU process the host first checks if the e.MMC device supports FFU
capabilities by reading SUPPPORTED_MODES and FW_CONFIG fields in the EXT_CSD. If the e.MMC
device supports the FFU feature the host may start the FFU process. The FFU process starts by
switching to FFU Mode in MODE_CONFIG field in the EXT_CSD. In FFU Mode host should use closed-
ended or open ended commands for downloading the new firmware and reading vendor proprietary
data. In this mode, the host should set the argument of these commands to be as defined in FFU_ARG
field.
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