5
LMK61E0-050M
,
LMK61E0-155M
,
LMK61E0-156M
,
LMK61E2-100M
,
LMK61E2-125M
LMK61E2-156M
,
LMK61E2-312M
,
LMK61A2-100M
,
LMK61A2-125M
,
LMK61A2-156M
LMK61A2-312M
,
LMK61A2-644M
,
LMK61I2-100M
www.ti.com.cn
ZHCSG14D –OCTOBER 2015–REVISED OCTOBER 2017
Copyright © 2015–2017, Texas Instruments Incorporated
(1) Refer to Parameter Measurement Information for relevant test conditions.
(2) On-chip power dissipation should exclude 40 mW, dissipated in the 150 ohm termination resistors, from total power dissipation.
6.5 Electrical Characteristics - Power Supply
(1)
VDD = 3.3 V ± 5%, T
A
= -40C to 85°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IDD Device current consumption LVPECL
(2)
162 208 mA
LVDS 152 196
HCSL 155 196
IDD-PD Device current consumption
when output is disabled
OE = GND 136 mA
(1) Refer to Parameter Measurement Information for relevant test conditions.
(2) An output frequency over f
OUT
max spec is possible, but output swing may be less than V
OD
min spec.
(3) Ensured by characterization.
6.6 LVPECL Output Characteristics
(1)
VDD = 3.3 V ± 5%, T
A
= -40C to 85°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
OUT
Output frequency
(2)
10 1000 MHz
V
OD
Output voltage swing
(V
OH
– V
OL
)
(2)
700 800 1200 mV
V
OUT, DIFF, PP
Differential output peak-to-
peak swing
2 ×
|V
OD
|
V
V
OS
Output common-mode voltage VDD –
1.55
V
t
R
/ t
F
Output rise/fall time (20% to
80%)
(3)
120 200 ps
PN-Floor Output phase noise floor
(f
OFFSET
> 10 MHz)
156.25 MHz –165 dBc/Hz
ODC Output duty cycle
(3)
45% 55%
(1) An output frequency over f
OUT
max spec is possible, but output swing may be less than V
OD
min spec.
(2) Ensured by characterization.
6.7 LVDS Output Characteristics
(1)
VDD = 3.3 V ± 5%, T
A
= –40°C to 85° C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
OUT
Output frequency
(1)
10 900 MHz
V
OD
Output voltage swing
(V
OH
– V
OL
)
(1)
300 390 480 mV
V
OUT, DIFF, PP
Differential output peak-to-
peak swing
2 ×
|V
OD
|
V
V
OS
Output common-mode voltage 1.2 V
t
R
/ t
F
Output rise/fall time (20% to
80%)
(2)
150 250 ps
PN-Floor Output phase noise floor
(f
OFFSET
> 10 MHz)
156.25 MHz –162 dBc/Hz
ODC Output duty cycle
(2)
45% 55%
R
OUT
Differential output impedance 125 Ohm