TI TMS9914A GPIB控制器手册：接口与注册详解

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"TI TMS9914A GPIB 控制器手册" TI TMS9914A是一款专门设计用于实现微处理器系统与通用接口总线（GPIB）之间接口的控制器，该总线遵循IEEE-488 1975/78标准及1980年的补充标准IEEE-488A。器件通过8位内存映射寄存器进行控制和配置，能够实现标准中的多种功能，包括说话者、监听者和控制器的角色。手册的重要通知表明，德州仪器(Texas Instruments)保留在任何时候改进设计和提供最佳产品的权利，但不承担任何关于所示电路可能存在的专利侵权责任。该手册的内容涵盖了从1982年起的版权信息，并列出了详细的目录，包括以下部分： 1. **介绍** - 1.1 描述：这部分可能详细解释了TMS9914A的基本功能和其在GPIB环境中的作用。 - 1.2 关键特性：列出器件的主要技术规格和优点。 - 1.3 与TMS9914的关系：对比或解释TMS9914A与前代产品TMS9914的区别。 - 1.4 IEEE-488 1975/78接口总线简介：对GPIB标准的概述。 - 1.5 典型应用：列举TMS9914A可能被应用的场景。 2. **架构** - 2.1 寄存器：这部分详细介绍了TMS9914A的各种寄存器，包括： - 2.1.1 中断屏蔽和状态寄存器0和1：用于管理和检测中断事件。 - 2.1.2 地址状态寄存器：存储和指示设备地址信息。 - 2.1.3 地址寄存器：设置和读取GPIB总线上的设备地址。 - 2.1.4 辅助命令寄存器：发送特殊控制命令。 - 2.1.5 辅助命令描述：解释每个辅助命令的功能。 - 2.1.6 总线状态寄存器：显示GPIB总线的当前状态。 - 2.1.7 串行轮询寄存器：参与GPIB的串行轮询过程。 - 2.1.8 命令传递通过寄存器：允许直接将命令传递到总线。 - 2.1.9 并行轮询寄存器：在并行轮询过程中使用。 - 2.1.10 数据入寄存器：接收来自总线的数据。 - 2.1.11 数据出寄存器：向总线发送数据。 - 2.2 直接内存访问（DMA）功能：这部分可能涉及如何利用TMS9914A进行高效的数据传输。手册的其余部分可能包括了硬件安装指南、软件编程接口、故障排查和维护信息等，为用户提供了全面的TMS9914A控制器操作和集成指导。这个控制器在测试与测量、自动化和工业控制领域中具有广泛的应用，因为它允许微处理器系统与其他GPIB兼容设备进行通信。

The force group execute trigger (fget) and return

local (rtll auxiliary commands have a clear/set mode

operation

and a pulsed mode

operation. They behave

normal clear/set features, but

they

are

written

with

'cs'

'0'

when they have not been previously set, then they will pulse true. Using the

'fget'

command

this manner will pro-

duce a pulse

approximately 1 ,.s at the

pin (with a 5 MHz clock). The

'rtl'

command used in this

way

will cause

a return

one

the local states (assuming local lockout is not

force) but the

TMS9914A

may reenter the

remote state next time the listen address occurs

(see

Section 3.6).

TABLE

2-3-AUXILIARY

COMMANDS

cIs

f3 f2

0/1 0 0 0

0 0 0

0/1 0

0/1 0 0

na 0 0 1

0/1 0 0 1

0/1 0 0

na 0 1 0

0/1 0 1 0

011

na 0

1 0

na 0 1

1 1

0/1

0 1 1

011

0 1

0/1 1 0 0

na 1 0 0

0/1

1 0 0

1 0

0/1

0/1 1

0/1 1 0 1

0/1

1 1

2.1.6

Description

Auxiliary Commands

SoftwBre Reset (swrstJ

0/1

xxOOOOO

MNEMONIC

swrst

0 1 dacr

0 rhdf

hdfa

0 0 hdfe

0 1 nbaf

fget

rtl

feoi

0 1

Ion

ton

1 1 gt5

tca

tcs

rpp

sic

sre

0 1 rqc

1 0

ric

dai

0 0

pts

0 1 stdl

1 0 shdw

1 1

vstdl

rsv2

FEATURES

Software reset

Release

DAe

holdoff

Release

RFD

hold

off

Holdoff

all

data

Holdoff

EOI

only

New byte available false

Force group execute trigger

Return

local

Send

EOI

with

next byte

Listen

only

Talk only

standby

Take

control asynchronously

Take

control synchronously

Request

parallel poll

Send

interface clear

Send

remote enable

Request control

Release control

Disable

all interrupts

Pass

through next secondary

Short

settling time

Shadow handshake

Very short

delay

Request Service Bit 2

Setting this command causes the

TMS9914A

returned

a known idle state during which

will not take part

in any activity on the

GPIB.

This auxiliary command is set by the power-on

RESET

and the chip should

configured

while

'swrst'

is set. Configuration should include writing the address

the device into the Address Register,

writing mask values into the Interrupt Mask Registers and selecting the desired features

the Auxiliary Command

After

this,

'swrst'

may

cleared at which point the device becomes logically exis-

tent

on the

GPIB.

The Serial Poll Register and Parallel Poll Registers may also

written in this period but this is

not

necessary

there is no status

report

both

these are cleared by the power-on

RESET

pin. Table

2-4

lists the

various states and other conditions forced by

'swrst'.

2·6

TABLE

2-4-S0FTWARE

RESET

CONDITIONS

MNEMONIC

DESCRIPTION

SIDS

Source idle state

AIDS Acceptor idle state

TIDS Talker idle state

TPAS

Talker

primary idle state

LIDS Listener idle state

LPAS Listener primary state

NPRS

Negative poll response state

LOCS

Local state

CIDS

Controller idle state

SPIS

Serial poll idle state

PPSS

Parallel poll standby state

ADHS DAC holdoff state

AEHS

RFD

hold

off

on end state

SHFS

Source holdoff state

ENIS

D idle state

NOTES: 1.

See

Section 3 for definition

above.

2. All interrupt status bits are held

a 0 state, but interrupt mask bits are not affected.

Release DAC

Holdoff

(dacr)0/1xx00001

The Data Accepted (DAC)

holdoff

allows time

for

the host microprocessor

respond

unrecognized commands,

secondary addresses, and device trigger

device clear commands. The

holdoff

is released by the MPU when the re-

quired action has been taken. Normally the command is loaded

with

the clear/set

bit

zero; however, when used

with

the address pass through feature

is set

one

the secondary address

was

valid or

zero

invalid (see

APT interrupt in Section

2.1.2).

Release

RFD

Holdoff

(rhdf)naxxOOO

Any

Ready For Data

(RFD)

holdoff

caused by a

'hdfa'

'hdfe'

is released.

Holdoff

All

Data (hdfa)

0/1

xxOOO 11

A Ready For Data

(RFD)

holdoff

is caused on every data byte until the command is loaded

with

set

zero. The

handshake must

completed

after

each

byte

has been received by the MPU using the

'rhdf'

command.

Holdoff

on End (hdfe)0/1 xxOO 1

RFD

holdoff

will occur when

end

data string message

(EOI

true

with

ATN false) is received over the inter-

face. This

holdoff

must be released using

'rhdf'.

Set

New

Byte A vailable False (nbaf)naxxOO 101

If a talker is interrupted before the

byte

just

stored in the data

out

will

normally be transmitted

soon

the ATN line returns

the false state. If,

a result

the interrupt, this

byte

no longer required, its transmission may be suppressed using the

'nbaf'

command.

Force Group Execute Trigger (fget)0/1 xxOO

110

The state

the

output

from

the

TMS9914A

affected when this command

executed.

the CS

bit

is zero,

the

line is pulsed high for approximately 5 clock cycles

1'5

5 MHz).

is one, the

line goes high until

'fget'

is sent

with

equal

zero. No interrupts or handshakes are initiated.

Return to Local (rt/J0/1 xxOO 111

Provided

the

local lockout (LLO) has

not

been enabled, the remote/local status

bit

is reset, and an interrupt is

generated (if

enabled)

inform the

host

microprocessor

that

should respond

the

front

panel controls.

the

bit

is set

one the

'rtl'

command

must

be cleared (CS = 0) before the device is able

return

remote control.

CS is set

zero, the device may return

remote

without

first

clearing'

rtl'.

Force End

Identify (feoi) naxxO 1

000

This command causes the

EOI

message

be sent

with

the

data byte. The

EOI

line is then reset.

2-7

Listen Only (Ion) 011xx01001

The listener state is activated until the command is sent

with

set

0 or until deactivated by a bus command.

Talk

Only (ton) 011xx01010

The talker state is activated until the command is sent

with

set

0 or until deactivated by a bus command.

NOTE

'ton'

and 'Ion' are included for use in systems

without

a controller. However, where the

TMS9914A

is being used

a controller,

utilizes the 'Ion' and

'ton'

functions

set

itself up

a listener

talker, respectively. Care must therefore

taken

ensure these

functions are reset

sending UNL or OTA.

to Standby (gts)naxxO

1011

Issued by the controller in charge

set the ATN line false.

Take

Control Synchronously (tcs)naxxO

1101

Control is again taken by the controller in charge, and ATN is asserted.

the controller is

not

a true listener, the

shadow handshake command must be used

monitor the handshake lines so that the TMS9

is synchronous

with

the talkerllisteners and only sends ATN true

the end

byte transfer. This ensures

that

no data is lost or cor-

rupted.

Request Parallel Poll

(rpp)011 xxO

1110

This is executed by the controller

charge

send the parallel poll command over the interface (the

TMS9914A

must

the

Controller Active State

that the Attention line is asserted). The poll is completed by reading the

Command

Pass

Through Register

obtain the status bits, then sending

'rpp'

with

the

bit

zero.

Take Control Asynchronously

(tca)naxxO

1100

This command is used by the controller in charge

set the attention line true and

gain control

the interface.

The command is executed

immediately and data corruption or loss may occur

a talker/listener is in the process

transferring a data byte.

Send Interface Clear

(sic)011 xxO

1111

The

IFC

line is set true when this command is sent

with

set

one. This must only

sent by the system con-

troller

and should

reset

(CS

= 0) after the

IEEE

minimum time for

IFC

has elapsed (1001'8). The system con-

troller

put

into the controller active state.

Send Remote Enable

(sre)011

10000

Issued

the system controller

set the

REN

line true and send the remote enable message over the interface,

REN

is set false by sending 'sre'

with

zero.

Request Control (rqc)naxx

10001

When the TCT command has been recognized via the unidentified command pass through, this command is sent by

the MPU. The

TMS9914A

waits

for

the ATN line

go false and then enters the controller active state (CACS).

Release Control (ric)naxx

10010

This command is used after TCT has been sent and handshake completed

release the ATN line and pass control

another device.

Disable

All

Interrupts (dai)011

10011

The

iNi'

line is disabled,

but

the interrupt registers and any holdoffs selected

are

not affected.

Pass Through

Secondary (pts)naxx

10100

This feature may be used

carry out a remote configuration

a parallel poll. The parallel poll configure command

(PPC)

is passed through the

TMS9914A

unrecognized addressed command and is identified by the MPU. The

'pts'

command is loaded, and the next byte received by the

TMS9914A

is passed through via the Command

Pass

Through Register. This would

the parallel poll enable

(PPE),

which is read

the microprocessor.

2·8

Set

Delay

(std1)1xx10101

The

delay time can

set

6 clock cycles

(1.2

P.s

5 MHz)

this command

sent

with

the

bit

one. The

TI delay time is

clock cycles

(2.2

p'S

5 MHz) following a power-on reset or

the command is sent

with

set

zero.

Shadow Handshake

(shdw)011xx10110

This feature enables the controller in charge

carry

out

the listener handshake

without

participating in a data

transfer. The Data Accepted

line (DAC) is pulled true a maximum

3 clock cycles after Data Valid (DAV)

receiv-

ed, and

Not

Ready For Data

(NRFD)

is allowed

go false

soon

DAV

is removed.

The shadow handshake function

allows the

'tcs'

command

be synchronized

with

the Acceptor

Not

Ready State

(ANRS)

that

A TN can be re-asserted

without

causing the loss or corruption

data byte. The

END

interrupt can

also

received and causes a

RFD

hold

off

be generated.

Very

Short

Delay

(vstdl

)0/1

xxl

0111

this feature is enabled, the

GPIB

settling time

(Tl)

will

be reduced

3 clock cycles

(600

5 MHz) on the

se-

cond and subsequent data bytes when ATN is false. Otherwise, the

GPIB

settling time is determined by the

stdl

feature.

Request Service

Bit

2 (rsv2)011

11000

The rsv2 bit performs the same function as the

rsvl

bit

(see Section

2.1.8)

but provides a means

requesting ser-

vice which

independent

the Serial Poll Register.

This

allows minor updates

be made

the Serial Poll Register

without

affecting the state

the request service.

addition, rsv2 is cleared when the serial poll status

byte

is sent

the

controller during a serial poll. It

therefore

used in situations where a service request is

simply a request from an instrument

for

the controller

poll its status.

As soon

this happens, rsv2 is cleared since

the

reason

for

requesting service has been satisfied. This eliminates

the burden

clearing the

bit

from

the host MPU

but

also guarantees

that

rsv2

cleared before another serial

poll

can occur.

this were

not

so, there

would

be a possibility

a second status byte being sent

with

the

RQS

message true, which could result in confusion for the controller. (rsv2

cleared on: SPAS.(APRSl +APRS2).STRS).

It should

noted

that

the

vstdl

and rsv2 features were

not

present on the

TMS9914.

2.1.7

Bus Status Register

ATN

OAV

NOAC

NRFO

EOI

5RQ

IFC

REN

MPU

BUS

The host MPU may examine the status

the

GPIB

management lines

the time

reading.

The

IFC

bit

this register does

not

indicate a true value

the device

a system controller using the

'sic'

auxiliary

command.

2.1.8

Serial Poll Register

rsvl

56 55

0108 0107

0106 0105

S8, S6-S0 Device status

rsv 1 Request service

bit

S4 S3

0104 0103

04 05

0102

0101

GPIB

MPU

BUS

Bits S8, S6-S1

ofthis

out

over

the

GPIB

when the device

addressed during a serial poll. They

are

cleared by a hardware reset

but

not

'swrst'

and

may

therefore

set up during configuration

the chip. These

bits are

fully double buffered and

the register is

written

while the device

.is

addressed during a serial poll (serial

poll

active state, SPAS), the value

written

is saved, and these bits are updated when SPAS

terminated.

2-9

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