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VSP_RF regulator
The intention of this regulator is to improve PSRR of the transmitter (the noise of the transmitter power supply is
emitted and fed back to the receiver). The VSP_RF regulator operation is controlled and observed by writing and
reading two regulator registers:
• Regulator voltage control register controls the regulator mode and regulated voltage. Bit reg_s controls
regulator mode. In case it is set to 0 (default state) the regulated voltage is set using direct command Adjust
Regulators. When bit reg_s is asserted to 1 regulated voltage is defined by bits rege_3 to rege_1 of the
same register. The regulated voltage adjustment range depends on the power supply mode. In case of 5 V
supply mode the adjustment range is between 3.9 V and 5.1 V in steps of 120 mV, in case of 3.3 V supply
mode the adjustment range is from 2.4 V to 3.4 V with steps of 100 mV. Default regulated voltage is the
maximum one (5.1 V and 3.4 V in case of 5 V and 3.3 V supply mode respectively).
• Regulator and Timer Display register is a read only register that displays actual regulated voltage when
regulator is operating. It is especially useful in case of automatic mode, since the actual regulated voltage,
which is the result of direct command Adjust Regulators, can be observed.
The VSP_RF regulator also includes a current limiter that limits the regulator typically to current of 200 mA
rms
in
normal operation (500 mA in case of short). In case the transmitter output current higher the 200 mA
rms
is
required, VSP_RF regulator cannot be used to supply the transmitter, VSP_RF has to be externally connected to
VDD (connection of VSP_RF to supply voltage higher than V
DD
is not allowed).
The voltage drop of the transmitter current is the main source of the ST25R3911B power dissipation. This voltage
drop is composed of drop in the transmitter driver and in the drop on VSP_RF regulator. Due to this it is
recommended to set regulated voltage using direct command Adjust Regulators. It results in good power supply
rejection ration with relatively low dissipated power due to regulator voltage drop.
In power‑down mode the VSP_RF regulator is not operating.
VSP_RF pin is connected to VDD through 1 kΩ resistor.
Connection through resistors ensures smooth power-up of the system and a smooth transition from power‑down
mode to other operating modes.
VSP_A and VSP_D regulators
VSP_A and VSP_D regulators are used to supply the ST25R3911B analog and digital blocks, respectively.
In 3.3 V mode, VSP_A and VSP_D regulator are set to the same regulated voltage as the VSP_RF regulator, in 5
V mode VSP_A and VSP_D regulated voltage is fixed to 3.4 V.
The use of VSP_A and VSP_D regulators is obligatory in 5 V mode since analog and digital blocks supplied with
these two pins contain low voltage transistors that support maximum supply voltage of 3.6 V. In 3.3 V supply
mode the use of regulators is strongly recommended in order to improve PSRR of analog processing.
For low cost applications it is possible to disable the VSP_D regulator and to supply digital blocks through
external short between VSP_A and VSP_D (configuration bit vspd_off in the I/O Configuration register 2. In case
VSP_D regulator is disabled VSP_D can alternatively be supplied from VDD (in 3.3 V mode only) in case VSP_A
is not more than 300 mV lower than VDD.
Power-down support block
In the Power-down mode the regulators are disabled in order to save current. In this mode a low power
power‑down support block that maintains the VSP_D and VSP_A in below 3.6 V is enabled. Typical regulated
voltage in this mode is 3.1 V at 5 V supply and 2.2 V at 3 V supply. When 3.3 V supply mode is set the Power-
down support block is disabled, its output is connected to VDD through 1 kΩ resistor.
Typical consumption of Power-down support block is 600 nA at 5 V supply.
Measurement of supply voltages
Using direct command Measure Power Supply it is possible to measure V
DD
and regulated voltages VSP_A,
VSP_D, and VSP_RF.
ST25R3911B
Application information
DS11793 - Rev 5
page 18/114