请给出用verilog语言实现以下功能的代码:由按键KEY0、KEY1控制计数器的值并在数码管上显示,每按下抬起一次KEY0计数加1,每按下抬起一次KEY1计数减1,计数加到100时归零,按照十进制在数码管的两位上显示,按下复位按钮后计数归零,其中两数码管为共阴极,并给出响应的检测其功能的testbentch测试文件代码
时间: 2024-03-04 07:49:18 浏览: 116
按键计数将结果通过8段数码管显示FPGA设计Verilog逻辑源码Quartus11.0工程文件.zip
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以下是用verilog语言实现以上功能的代码:
```
module counter(
input CLK, //时钟信号
input RST, //复位信号
input KEY0, //按键0
input KEY1, //按键1
output reg [6:0] SEG_A, //数码管A
output reg [6:0] SEG_B //数码管B
);
reg [6:0] count; //定义计数器
always @(posedge CLK) begin
if (RST) begin //复位信号为高,计数器清零
count <= 0;
SEG_A <= 7'b111_1111; //数码管显示空
SEG_B <= 7'b111_1111;
end
else if (KEY0) begin //按键0为高,计数器加1
count <= count + 1;
end
else if (KEY1) begin //按键1为高,计数器减1
count <= count - 1;
end
if (count >= 100) begin //计数器加到100,归零
count <= 0;
end
end
assign SEG_A = {7'b000_0001, //数码管A的数字编码
7'b100_1111,
7'b001_0010,
7'b000_0110,
7'b100_1100,
7'b010_0100,
7'b010_0000,
7'b000_1111,
7'b000_0000,
7'b000_0100};
assign SEG_B = {7'b000_0001, //数码管B的数字编码
7'b100_1111,
7'b001_0010,
7'b000_0110,
7'b100_1100,
7'b010_0100,
7'b010_0000,
7'b000_1111,
7'b000_0000,
7'b000_0100};
always @(*) begin //根据计数器的值显示在数码管上
if (count < 10) begin
SEG_A = SEG_A[count];
SEG_B = SEG_B[0];
end
else begin
SEG_A = SEG_A[count % 10];
SEG_B = SEG_B[count / 10];
end
end
endmodule
```
以下是响应的testbench测试文件代码:
```
`timescale 1ns / 1ns
module counter_tb;
reg CLK;
reg RST;
reg KEY0;
reg KEY1;
wire [6:0] SEG_A;
wire [6:0] SEG_B;
counter uut(
.CLK(CLK),
.RST(RST),
.KEY0(KEY0),
.KEY1(KEY1),
.SEG_A(SEG_A),
.SEG_B(SEG_B)
);
initial begin
CLK = 0;
forever #5 CLK = ~CLK;
end
initial begin
RST = 1;
#10 RST = 0;
end
initial begin
KEY0 = 0;
KEY1 = 0;
//按键0加1
#10 KEY0 = 1;
#10 KEY0 = 0;
#10 KEY0 = 1;
#10 KEY0 = 0;
//按键1减1
#10 KEY1 = 1;
#10 KEY1 = 0;
#10 KEY1 = 1;
#10 KEY1 = 0;
//计数器加到100
#200 {KEY0 = 1; KEY0 = 0;} repeat(100);
//复位计数器
#10 RST = 1;
#10 RST = 0;
//按键1减1
#10 KEY1 = 1;
#10 KEY1 = 0;
#10 KEY1 = 1;
#10 KEY1 = 0;
//按键0加1
#10 KEY0 = 1;
#10 KEY0 = 0;
#10 KEY0 = 1;
#10 KEY0 = 0;
//计数器加到100
#200 {KEY0 = 1; KEY0 = 0;} repeat(100);
//复位计数器
#10 RST = 1;
#10 RST = 0;
//按键0加1
#10 KEY0 = 1;
#10 KEY0 = 0;
#10 KEY0 = 1;
#10 KEY0 = 0;
//按键1减1
#10 KEY1 = 1;
#10 KEY1 = 0;
#10 KEY1 = 1;
#10 KEY1 = 0;
//计数器加到100
#200 {KEY0 = 1; KEY0 = 0;} repeat(100);
//复位计数器
#10 RST = 1;
#10 RST = 0;
//按键1减1
#10 KEY1 = 1;
#10 KEY1 = 0;
#10 KEY1 = 1;
#10 KEY1 = 0;
//按键0加1
#10 KEY0 = 1;
#10 KEY0 = 0;
#10 KEY0 = 1;
#10 KEY0 = 0;
//计数器加到100
#200 {KEY0 = 1; KEY0 = 0;} repeat(100);
$finish; //结束仿真
end
endmodule
```
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