格雷码转二进制的verilog程序及其testbench文件编写

以下是格雷码转二进制的 Verilog 程序及其 Testbench 文件的编写：

// Gray to binary Verilog code
module gray_to_binary(
    input [3:0] gray,
    output [3:0] binary
);

assign binary[3] = gray[3];
assign binary[2] = binary[3] ^ gray[2];
assign binary[1] = binary[2] ^ gray[1];
assign binary[0] = binary[1] ^ gray[0];

endmodule

// Testbench for gray_to_binary module
module gray_to_binary_tb;

reg [3:0] gray;
wire [3:0] binary;

gray_to_binary uut (
    .gray(gray),
    .binary(binary)
);

initial begin
    $display("Gray to Binary Conversion Testbench");

    // Test case 1
    gray = 4'b0000;
    #10 $display("Gray = %b, Binary = %b", gray, binary);

    // Test case 2
    gray = 4'b0101;
    #10 $display("Gray = %b, Binary = %b", gray, binary);

    // Test case 3
    gray = 4'b1111;
    #10 $display("Gray = %b, Binary = %b", gray, binary);

    // Add more test cases here

    $finish;
end

endmodule

这个程序将输入的 4 位格雷码转换为输出的 4 位二进制数。在 Testbench 文件中，我们可以添加多个测试用例来测试程序的正确性。