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LPC11U6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1.3 — 7 September 2016 18 of 97
NXP Semiconductors
LPC11U6x
32-bit ARM Cortex-M0+ microcontroller
[1] Pin state at reset for default function: I = Input; AI = Analog Input; O = Output; PU = internal pull-up enabled; IA = inactive, no
pull-up/down enabled;
F = floating; If the pins are not used, tie floating pins to ground or power to minimize power consumption.
[2] Special analog pad.
[3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as analog input, digital section of the pad is disabled and the pin is not 5 V tolerant; includes digital, programmable
filter.
[4] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as analog input, digital section of the pad is disabled and the pin is not 5 V tolerant; includes digital input glitch filter.
WAKEUP pin. The wake-up pin function can be disabled and the pin can be used for other purposes if the RTC is enabled for waking up
the part from Deep power-down mode.
[5] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis; includes
high-current output driver.
[6] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis.
[7] I
2
C-bus pin compliant with the I
2
C-bus specification for I
2
C standard mode, I
2
C Fast-mode, and I
2
C Fast-mode Plus. The pin requires
an external pull-up to provide output functionality. When power is switched off, this pin is floating and does not disturb the I2C lines.
Open-drain configuration applies to all functions on this pin.
[8] 5 V tolerant pad. RESET
functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up
from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode.
[9] Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode
only). This pad is not 5 V tolerant.
[10] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog crystal
oscillator connections. When configured for the crystal oscillator input/output, digital section of the pad is disabled and the pin is not 5 V
tolerant; includes digital, programmable filter.
VBAT 47 63 99 - - Battery supply. Supplies power to the RTC. If no battery is
used, tie VBAT to VDD.
V
SSA
41 54 85 - - Analog ground. V
SSA
should typically be the same voltage
as V
SS
but should be isolated to minimize noise and error.
V
SSA
should be tied to V
SS
if the ADC is not used.
V
SS
43,
2,
5
57,
3,
7
91,
7,
11,
53,
70
- - Ground.
Table 3. Pin description
Pin functions are selected through the IOCON registers. See Table 2
for availability of USART3 and USART4 pin functions.
Symbol
LQFP48
LQFP64
LQFP100
Reset
state
[1]
Type Description of pin functions