IN
BI
BI
BI
BI
OUT
IN
BI
IN
IN
IN
OUT
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
OUT
IN
IN
IN
IN
OUT
OUT
OUT
OUT
NC
IN
B1
OE*
VCCB
B2
B3
B4
GND
A4
A3
A2
A1
VCCA
OUT
IN
IN
IN
IN
OUT
IN
IN
IN
APPLE INC.
NONE
SCALE
REV.
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
NOTICE OF PROPRIETARY PROPERTY
DRAWING NUMBER
SHT
OF
SIZE
D
To XDP connector
and/or level translator
OBSDATA_A3
OBSFN_B0
OBSFN_B1
ITPCLK/HOOK4
OBSDATA_B0
OBSDATA_A2
MCP
U1400
U1000
CPU
TCK0
VCC_OBS_AB
HOOK3
SCL
SDA
HOOK2
HOOK1
TCK1
PWRGD/HOOK0
OBSDATA_B3
OBSDATA_B2
OBSDATA_A0
OBSFN_A1
OBSFN_A0
OBSDATA_B1
OBSDATA_A1
TMS
TDI
TRSTn
TDO
VCC_OBS_CD
OBSDATA_D3
ITPCLK#/HOOK5
RESET#/HOOK6
DBR#/HOOK7
OBSDATA_D2
XDP_PRESENT#
OBSDATA_C0
OBSFN_C0
OBSFN_D0
OBSDATA_D0
OBSDATA_C2
OBSFN_C1
OBSDATA_C3
OBSDATA_C1
OBSDATA_D1
OBSFN_D1
NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.
MCP79-specific pinout
XDP connector
XDP connector
From XDP connector
998-1571
9
13 65
R1399
1 2
201
MF
1/20W
5%
XDP
1K
6
20 42 68
6
20 42 68
R1305
1
2
201
MF
1/20W
54.9
1%
XDP
C1300
1
2
10%
0.1uF
X5R
XDP
6.3V
201
J1300
1
10
1112
1314
1516
1718
19
2
20
2122
2324
2526
2728
29
3
30
3132
3334
3536
3738
39
4
40
4142
4344
4546
4748
49
5
50
5152
5354
5556
5758
59
6
60
78
9
F-ST-SM
LTH-030-01-G-D-NOPEGS
CRITICAL
XDP_CONN
C1301
1
2
10%
X5R
XDP
0.1UF
6.3V
201
6 9
65
6 9
65
6 9
12 65
8 9
13 65
R1303
1 2
201
MF
1/20W
PLACEMENT_NOTE=Place close to CPU to minimize stub.
1K
5%
XDP
6 9
65
6 9
65
6 9
65
6 9
65
6
12 20
6
12 20
6
12 20
6
18 68
6
18 68
6
18 68
6
18 68
6
18 68
6
18 68
6
18 68
6
18 68
12 20
6
12
6
13 65
6
13 65
6
12
6 9
12 65
6 9
12 65
6 9
12 65
6 9
24
C1316
1
2
201
X5R
6.3V
JTAG_ALLDEV
10%
0.1UF
U1310
2
3
4
5
10
9
8
7
6
12
1
11
JTAG_ALLDEV
UQFN
NLSV4T244
C1311
1
2
201
X5R
6.3V
10%
JTAG_ALLDEV
0.1UF
R1311
1
2
5%
MF
1/20W
201
10K
JTAG_ALLDEV
R1312
1
2
1/20W
201
MF
5%
0
NO STUFF
6
12
R1313
1 2
MF
0
5%
1/20W
201
XDP
6 9
12 65
6 9
12 65
6 9
12 65
6 9
12 65
6
12
R1314
1 2
201
MF
1/20W
0
5%
XDP
6 9
12 65
6
9
12
65
eXtended Debug Port (XDP)
71
2.3.0
12
SYNC_MASTER=M97
051-7631
SYNC_DATE=02/04/2008
XDP_TDO_CONN
XDP_TDO
JTAG_MCP_TDO
XDP_TRST_L
=PP1V05_S0_CPU
JTAG_MCP_TDO_CONN
JTAG_MCP_TDI
FSB_CPURST_L
CPU_PWRGD
XDP_TMS
XDP_TCK
XDP_TDI
=PP3V3_S0_XDP
XDP_TCK
XDP_TMS
XDP_TRST_L
JTAG_LVL_TRANS_EN_L
JTAG_MCP_TMS
JTAG_MCP_TRST_L
JTAG_MCP_TCK
JTAG_MCP_TDO_CONN
JTAG_MCP_TRST_L
MCP_DEBUG<0>
MCP_DEBUG<1>
MCP_DEBUG<2>
MCP_DEBUG<3>
JTAG_MCP_TMS
JTAG_MCP_TDI
MCP_DEBUG<5>
MCP_DEBUG<4>
MCP_DEBUG<6>
FSB_CLK_ITP_P
MCP_DEBUG<7>
=PP3V3_S0_XDP
FSB_CLK_ITP_N
XDP_CPURST_L
XDP_DBRESET_L
XDP_TDI
XDP_TRST_L
XDP_TDO_CONN
XDP_TMS
XDP_BPM_L<5>
XDP_BPM_L<4>
XDP_BPM_L<3>
XDP_BPM_L<2>
XDP_BPM_L<1>
XDP_BPM_L<0>
TP_XDP_OBSFN_B0
TP_XDP_OBSFN_B1
TP_XDP_OBSDATA_B1
TP_XDP_OBSDATA_B0
TP_XDP_OBSDATA_B2
XDP_PWRGD
TP_XDP_OBSDATA_B3
XDP_OBS20
=PP1V05_S0_CPU
PM_LATRIGGER_L
JTAG_MCP_TCK
SMBUS_MCP_0_CLK
SMBUS_MCP_0_DATA
XDP_TCK
12
12
11
11
10
10
9
20
12
20
20
12
9
65
7
12
7
12
12
20
7
65
7
9
20
6
6
6
6
6
12
6
6
6
6
6
6
6
6
6
6
6