DRV3205-Q1：集成三相电机驱动器与保护功能

需积分: 10 177 浏览量更新于2024-06-29 5 收藏 1MB PDF 举报

"TI-DRV3205-Q1.pdf" TI-DRV3205-Q1是一款专为汽车应用设计的高性能三相电机驱动控制器，它集成了三个电流感应放大器、一个升压转换器以及保护和诊断功能，旨在提供稳定可靠的电机驱动解决方案。该器件遵循AEC-Q100标准，确保在-40°C至+125°C的恶劣环境中也能正常工作，特别适合12V和24V的应用场景。 DRV3205-Q1的主要特性包括： 1. 三相桥驱动器：设计用于控制电机的三相电流，支持正弦波或方波驱动，适用于电动机和无刷直流电机等应用。 2. 集成电流感应放大器：内置的三个高精度放大器可以精确地监测电机的电流状态，从而实现更精确的电机控制和故障检测。 3. 升压转换器：为栅极驱动提供高达4.75V的电压，确保高效驱动6个独立的N沟道功率MOSFET。 4. 强驱动能力：能够提供1A的栅极驱动电流，适配大电流FET，提高开关速度并降低开关损耗。 5. 可编程死区时间：用户可以通过设置死区时间来优化开关性能，减少开关节点的交叉导通现象。 6. PWM频率高达20kHz：允许高速电机控制，同时保持较低的电磁干扰。 7. 支持100%占空比：在需要全速运行或低速精细控制时，都能提供良好的性能。 8. 多种保护功能：包括VDS监视器（可调整检测阈值）、分流限流（可调检测电平）、过压和欠压保护、过热警告及关断，确保设备在各种异常情况下仍能安全运行。 9. SPI接口：通过SPI串行接口可以实现复杂的故障检测和处理，以及系统监控功能，如Q&A看门狗、I/O电源监视和ADREF监视。 10. 诊断与故障反馈：实时监测和诊断系统状态，提供详细的故障信息，有助于故障排除和系统稳定性。这款驱动器的这些特性使其成为汽车电子系统，尤其是电动汽车和混合动力汽车电机控制的理想选择，其高集成度和强大的保护功能为系统设计提供了灵活性和可靠性。结合TI的技术文档、工具软件和支持社区，开发人员可以方便地将DRV3205-Q1集成到他们的项目中，实现高效、安全的电机驱动方案。

DRV3205-Q1

ZHCSFI6E –SEPTEMBER 2015–REVISED FEBRUARY 2017

www.ti.com.cn

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to network ground terminal, unless specified otherwise.

(3) I

VCC5

is not specifying VCC5 output current capability for external load. The allowed external load on VCC5 is specified at position 3.18

in Recommended Operating Conditions.

(4) The maximum value also depends on PCB thermal design, modulation scheme, and motor operation time.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)(2)

POS MIN MAX UNIT

2.1 VS, VSH DC voltage –0.3 60 V

2.1a VS DC voltage

Negative voltages with minimum serial

resistor 5 Ω, T

= 25°C

–5 V

2.1b VSH DC voltage

Negative voltages with minimum serial

resistor 10 Ω, T

= 25°C

–5 V

2.1c VS DC voltage

Negative voltages with minimum serial

resistor 5 Ω, T

= 105°C

–2.5 V

2.1d VSH DC voltage

Negative voltages with minimum serial

resistor 10 Ω, T

= 105°C

–2.5 V

2.2A GHSx Gate high-side voltage –9 70 V

2.2B SHSx Source high-side voltage –9 70 V

2.3 GHSx-SHSx

Gate-source high-side voltage

difference

Externally driven, internal limited, see

position 5.4 in Electrical Characteristics

–0.3 15 V

2.4 GLSx Gate low-side voltage –9 20 V

2.5 SLSx Source low-side voltage –9 7 V

2.6 GLSx-SLSx

Gate-source low-side voltage

difference

Externally driven, internal limited, see

position 5.5 in Electrical Characteristics

–0.3 15 V

2.7 BOOST, SW Boost converter –0.3 70 V

2.8 INx, IPx Current sense input voltage –9 7 V

2.8A INx, IPx Current sense input current Clamping current –5 5 mA

2.8C Ox Current sense output voltage –0.3

ADREF

+0.3

2.8D Ox Forced input current –10 10 mA

2.9 VDDIO Analog input voltage –0.3 60 V

2.9a ADREF Analog input voltage –0.3 60 V

2.10

ILSx,IHSx, EN,

DRVOFF, SCLK, NCS,

SDI

Digital input voltage –0.3 60 V

2.11 RVSET Analog input voltage –0.3 60 V

2.13 GNDA, GNDLS_B Difference between GNDA and GNDLS_B –0.3 0.3 V

2.20 Maximum slew rate of SHSx pins, SR

SHS

–250 250 V/µs

2.21 ERR, SDO, RO Analog and digital output voltages –0.3 6 V

2.21

ERR, SDO, RO Forced input/output current –10 10 mA

2.22 TEST Unused pins. Connect to GND. –0.3 0.3 V

2.24 VCC5 Internal supply voltage –0.3 6 V

2.24

Short-to-ground current, I

VCC5

(3)

Internal current limit 80 mA

2.25 VCC3 Internal supply voltage –0.3 3.6 V

2.26 Short-to-ground current, I

VCC3

Limited by VCC5 80 mA

2.27

Driver FET total gate charge (per

FET), Q

gmax

VS = 12 V, ƒ

PWM

= 20 kHz, 6 FETs

ON/OFF per PWM cycle

200

(4)

2.28

VS = 24 V, ƒ

PWM

= 20 kHz, 6 FETs

ON/OFF per PWM cycle

100

(4)

DRV3205-Q1

www.ti.com.cn

ZHCSFI6E –SEPTEMBER 2015–REVISED FEBRUARY 2017

Absolute Maximum Ratings (continued)

over operating free-air temperature range (unless otherwise noted)

(1)(2)

POS MIN MAX UNIT

2.14 Operating virtual junction temperature, T

–40 150 °C

2.15 Storage temperature, T

stg

–55 165 °C

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings

POS VALUE UNIT

2.17

(ESD)

Electrostatic

discharge

Human-body model (HBM), per AEC Q100-002

(1)

All pins ±2000

Pins 4, 6, and 14 ±4000

2.18

Charged-device model (CDM), per AEC Q100-011

All pins ±500

2.19

Corner pins (1, 12, 13, 24, 25, 36, 37,

and 48)

±750

(1) Maximum PWM allowed also depends on maximum operating temperature, FET gate charge current, VS supply voltage, modulation

scheme, and PCB thermal design.

6.3 Recommended Operating Conditions

POS MIN NOM MAX UNIT

3.1 VS

Supply voltage, normal voltage

operation

Full device functionality. Operation at VS = 4.75 V

only when coming from higher VS. Minimum VS

for startup = 4.85 V

4.75 40 V

3.2 VSLO Supply voltage, logic operation

Logic functional (during battery cranking after

coming from full device functionality)

4 40 V

3.3 VDDIO Supply voltage for digital I/Os 2.97 5.5 V

3.4 D Duty cycle of bridge drivers 0% 100%

3.5 ƒ

PWM

PWM switching frequency 0 22

(1)

kHz

3.6A I

VSn

VS quiescent current normal

operation (boost converter

enabled, drivers not switching)

Boost converter enabled, see and for SHSx/SLSx

connections. EN_GDBIAS = 1

22 mA

3.61A I

VSn

VS quiescent current normal

operation (boost converter

enabled, drivers not switching)

Boost converter enabled, see and for SHSx/SLSx

connections. EN_GDBIAS = 0

22.3 mA

3.6B

BOOSTn

BOOST pin quiescent current

normal operation (drivers not

switching)

4.75 V < VS < 20 V, T

= 25°C to 125°C 9 mA

3.62B 4.75 V < VS < 20 V, T

= –40°C 10

3.61B I

VSn

VS quiescent additional current

normal operation because of

RVSET thermal voltage output

enabled (boost converter

enabled, drivers not switching)

THERMAL_RVSET_EN = 1 0.6

3.6C

BOOSTn

BOOST pin quiescent current

normal operation (drivers not

switching)

20 < VS < 40 V, T

= 25°C to 125°C 9.5

3.61C 20 < VS < 40 V, T

= –40°C 10.5

3.6D I

BOOST,sw

BOOST pin additional load

current because of switching gate

drivers

Excluding FET gate charge current. 20-kHz all

gate drivers switching at the same time.

EN_GDBIAS = 1

4 mA

3.61D I

BOOST,sw

BOOST pin additional load

current because of switching gate

drivers

Excluding FET gate charge current. 20-kHz all

gate drivers switching at the same time.

EN_GDBIAS = 0

5.4 mA

3.75 I

VSq_1

VS quiescent current shutdown

(sleep mode) 1

VS = 14 V, no operation, T

< 25°C, EN = Low,

total leakage current on all supply connected pins

20 µA

3.75a I

VSq_2

VS quiescent current shutdown

(sleep mode) 2

VS = 14 V, no operation, T

< 85°C, EN = Low,

total leakage current on all supply connected pins

30 µA

3.8 T

Junction temperature –40 150 °C

3.9 T

Operating ambient free-air

temperature

With proper thermal connection –40 125 °C

3.11 V

INx

IPx

Current sense input voltage V

IPx

– V

Inx

, RO = 2.5 V GAIN = 12 –0.15 0.15 V

3.13 ADREF Clamping voltage for current sense amplifier outputs O1/2/3 2.97 5.5 V

3.13a Reserved V

剩余30页未读，继续阅读

不觉明了

粉丝: 3521
资源: 5759

DRV3205-Q1：集成三相电机驱动器与保护功能

TI-DRV3201-Q1.pdf

TI-DRV8848

ace-drv32.dll下载

ACE-SSC-DRV64

#define SETFN(fn) if(drv->fn) drv->drv.fn = amba_##fn

xorg-x11-drv-openchrome是什么包

最新资源