联想ThinkPad Edge E545 ( Compal LA-8127P )笔记本电脑电路原理图

E545

笔记本电脑

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AMD APU Richland FS1r2 + FCH Bolton-M3 + GPU Sun Pro M2

VALEA/VALEB Schematics Document

REV:1.0

Compal Confidential

2012-11-22

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Cover Page

1 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Cover Page

1 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Cover Page

1 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

1 1

2 2

3 3

4 4

AMD FS1r2 APU

x4 UMI Gen. 1

Bolton M3

Dual Channel

BANK 0, 1, 2

04pin DDRIII-SO-DIMM X2

1.5V DDRIII 1600 (1866)

emory BUS(DDRIII)

Richland

uPGA 722 pin

35mm x 35mm

2.5GT/s per lane

n Pro M2

128M16/256M16

DDR3 x 4

WLAN

USB PORT 3.0 x3

SATA3.0 HDD CONN

SATA ODD CONN

6*SATA serial

Internal MIC

BlueTooth CONN

CMOS Camera

CX20671-21Z

Audio Codec

2Channel Speaker

AZALIA

14*USB2.0/

4*USB3.0,10*USB2.0

Audio Jacks

Combo jack

USB PORT 2.0 x1 +Charger

LPC BUS

Int.KBD

ENE KB9012

Click Pad

Fintek 5303

Thermal Sensor

PCI Express

Mini card Slot 1

WLAN

PCI-E(WLAN)

USB(BT)

ile Name : VALEA/VALEB

ompal confidential

SPI ROM

4MB

n2PCIE x 8

LVDS Conn.

DP Port0

LVDS

translator

DP Port1

HDMI Conn.

DP Port2

LAN

GPP0

4 * x1 PCI-E 2.0

RTL 8111F

SATA0

SATA1

uFCBGA-656

24.5mm x 24.5mm

RTD2132S

ack Point

G Sensor

Finger Printer

Power Board

LAN

Audio Jack+

USB2.0

FingerPrint

Card reader

ODD board

Sub board

15" only

UPEK TCS5DA6C0

ST LIS34ALTR

4 in 1 Conn.

RTS5229

CardReader

CRT CONN

FCH CRT (VGA DAC)

GPP1GPP3

Page 5

～

～～

～

Page 10

～

～～

～

Page 12

～

～～

～

Page 17

～

～～

～

Page 25

Page 26

Page 27

Page 28

Page 29

Page 30

Page 31

Page 32

Page 33

Page 13

Page 33

Page 26

Page 34

Page 35

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Block Diagrams

2 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Block Diagrams

2 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Block Diagrams

2 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

1 1

2 2

3 3

4 4

EC SM Bus1 address

Device Address Address

EC SM Bus2 address

Device

Smart Battery

0001-011xb

HEX

9AH

SB-TSI

F75303 (DDR,VRAM,CPUCORE)1001-101xb

1001-100xb

98H

FCH SMB0

Device Address

HEX

DDR DIMM1 (FCH_SMB0)

DDR DIMM2 (FCH_SMB0)

1001-000xb

1001-001xb

WLAN (FCH_SMB0)

(FCH_SMB0)

H Hudson-M2/3

USB Port List

SB1.1

USB2.0

Port0

Port1

Port0

Port1

Port2

Port3

Port4

Port5

Port6

Port7

Port8

Port9

Port10

Port11

Port12

Port13

CMOS

USB 3.0

H Hudson-M2/3

SATA Port List

ATA0

SATA1

SATA2

SATA3

SATA4

SATA5

HDD

ODD

BOM Structure

UMA@ : UMA only

DIS@ : DIS muxless

CMOS@ : USB camera

CONN@ : ME components

X76@, H1G@, S1G@ : VRAM

15H

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

+RTCVCC

+2.5VS

+5VS

+3VS

+5VALW

+3VALW

+VSB ON ON*

ONON

ON ON*

+3VS_WLAN ON OFF

OFF

OFFON

OFF

ON*

OFF

RTC power

2.5V for APU VDDA

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

3.3V power rail for WLAN

+1.8VGS OFFON OFF1.8V switched power rail

+1.5VGS

+1.5V ON

OFF

ON OFF

1.5V switched power rail

1.5V power rail for APU VDDIO and DDR

+1.1VS

+1.2VS ON OFF OFF

ON OFF OFF1.1V switched power rail for FCH

1.2V (VDDR, VDDP) switched power rail for APU

+1.1VALW 1.1V switched power rail for FCH ON ON*ON

+APU_CORE_NB ON OFF OFFVoltage for On-die VGA of APU

+APU_CORE

Voltage Rails

B+

S0 S3 S5

ON OFF

N/A N/A N/A

N/AN/AN/A

Power Plane Description

OFF

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for APU

+VGA_CORE OFFOFFON

0.95-1.2V switched power rail

+0.75VS OFFON OFF0.75V switched power rail for DDR terminator

+0.95VGS ON OFF OFF0.95V switched power rail for VGA

OFF

+1.5VS OFF1.5V switched power rail ON OFF

Card Reader

Comal

PCIE Port List

CIE0

PCIE1

PCIE2

PCIE3

PCIE0

PCIE1

PCIE2

PCIE3

APUFCH

USB 3.0

USB2.0 Port

WLAN

Stencil Memo

WLAN

BOM option and stencil

SDV:

CMOS@/DIS@ + X76@

PJ201,PJ401,PJ502,PJ503,PJ504,PJ601,PJ603,PJ604,

PJ701,PJ702,PJ703,PJ704,J1,J2301,J2401,J2402,J2403

PJ402,PJ403,PJ501,PJ602,PJ801,PJ802,PJ803,PJ805

Sun Pro M2

82H

LVDS translator

Security ROM

1000-0010b

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Notes List

Custom

3 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Notes List

Custom

3 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

Notes List

Custom

3 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

D D

C C

B B

A A

VDD_CT(1.8VGS)

VDDR3(3.3VGS)

VDDC/VDDCI(1.12V)

PERSTb

Straps Reset

Straps Valid

REFCLK

VDDR1(1.5VGS)

Power-Up/Down Sequence

PCIE_VDDC(0.95VGS)

Global ASIC Reset

T4+16clock

All the ASIC supplies, except for VDDR3, must fully reach their respective

‧

ominal voltages within 20 ms of the start of the ramp-up sequence, though a

shorter ramp-up duration is preferred. There is no timing requirement on the

ramp up of VDDR3 relative to other power rails.

The external pull-up resistors on the DDC/AUX signals (if applicable) should

‧

amp up before or after both VDDC and VDD_CT have ramped up.

VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC

‧

hould reach 90% before VDD_CT starts to ramp up (or vice versa).

For power down, reversing the ramp-up sequence is recommended.

‧

+3VALW

+3VS

PXS_PWREN

FCH

+VGA_CORE

+0.95VGS

MOS

+3VGS

B+

U_RST#

GPU

Regulator

PWM

S_RST#

GPIO51

GPIO192

AND

GATE

+1.8VGS

+1.5VS

+1.8VS

+1.5VGS

PXS_PWREN

MOS

PERSTB

VGA_PWRGD

GPIO191

U_PCIE_RST#

APU

4.75K

SUN PRO VRAM STRAP

R1436

R1430

R1436

1 1

MT41J128M16JT-093G

SA000067510

FBGA Code:D9PTD

MT41J128M16JT-107G

SA00005SM30

FBGA Code:D9PRS

K4W2G1646E-BC1A

SA000068U10

3.4k

3.24k 5.62k

10k

PS_3[ 0 ]PS_3[ 1 ]

Vendor

8.45K

R1430 R1436

PS_3[ 2 ]

4.99K

R_pu R_pd

NC 4.75K

4.53K 2K

6.98K

R1436

00 1

0 1

0 0

R1430

4.53k 4.99K

H5TQ2G63DFR-11C

SA00003YO70

K4W2G1646E-BC11

SA00005SH00

R1430

K4W4G1646B-HC11

SA000068R00

MT41K256M16HA-107G

SA000065D00

FBGA Code:D9PZD

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

dGPU Block Diagram

Custom

4 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

dGPU Block Diagram

Custom

4 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

dGPU Block Diagram

Custom

4 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

ZZZ2

H1G

H1G@

X7635939L10

ZZZ2

H1G

H1G@

X7635939L10

ZZZ4

S2G

S2G@

X7635939L11

ZZZ4

S2G

S2G@

X7635939L11

ZZZ5

M2G

M2G@

X7635939L12

ZZZ5

M2G

M2G@

X7635939L12

ZZZ1

S1G

S1G@

X7635939L09

ZZZ1

S1G

S1G@

X7635939L09

1 1

2 2

3 3

4 4

LAN

Power Sequence of APU

+1.5V

+2.5VS

+1.5VS

+APU_CORE

+APU_CORE_NB

+1.2VS

Group A

Group B

Card Reader

WLAN

SDV/FVT, NO.1SDV/FVT, NO.1

P_ZVDDP

IE_CTX_C_GRX_P0

IE_CTX_C_GRX_N0

IE_CTX_C_GRX_P1

IE_CTX_C_GRX_N1

IE_CTX_C_GRX_P2

IE_CTX_C_GRX_N2

PCIE_CTX_C_GRX_P3

PCIE_CTX_C_GRX_N3

IE_CTX_GRX_P0

IE_CTX_GRX_N0

IE_CTX_GRX_P1

IE_CTX_GRX_N1

IE_CTX_GRX_P2

IE_CTX_GRX_N2

PCIE_CTX_GRX_P3

PCIE_CTX_GRX_N3

IE_CRX_GTX_P0

IE_CRX_GTX_N0

IE_CRX_GTX_P1

IE_CRX_GTX_N1

IE_CRX_GTX_P2

IE_CRX_GTX_N2

PCIE_CRX_GTX_P3

PCIE_CRX_GTX_N3

PCIE_CTX_C_DRX_P0

PCIE_CTX_C_DRX_N0

P_ZVSS

UMI_TXP0_C

UMI_TXN0_C

UMI_TXP1_C

UMI_TXN1_C

UMI_TXP2_C

UMI_TXN2_C

UMI_TXP3_C

UMI_TXN3_C

PCIE_CTX_C_DRX_P3

PCIE_CTX_C_DRX_N3

PCIE_CTX_C_DRX_P1

PCIE_CTX_C_DRX_N1

PCIE_CTX_C_GRX_P4

PCIE_CTX_C_GRX_P5

PCIE_CTX_C_GRX_N4

PCIE_CTX_C_GRX_N5

PCIE_CTX_C_GRX_P6

PCIE_CTX_C_GRX_N6

PCIE_CTX_C_GRX_P7

PCIE_CTX_C_GRX_N7

PCIE_CTX_GRX_P4

PCIE_CTX_GRX_N4

PCIE_CTX_GRX_P5

PCIE_CTX_GRX_N5

PCIE_CTX_GRX_P6

PCIE_CTX_GRX_N6

PCIE_CTX_GRX_P7

PCIE_CTX_GRX_N7

PCIE_CRX_GTX_P4

PCIE_CRX_GTX_N4

PCIE_CRX_GTX_P5

PCIE_CRX_GTX_N5

PCIE_CRX_GTX_P6

PCIE_CRX_GTX_N6

PCIE_CRX_GTX_P7

PCIE_CRX_GTX_N7

UMI_RXP0[12]

UMI_RXN0[12]

UMI_RXP1[12]

UMI_RXN1[12]

UMI_RXP2[12]

UMI_RXN2[12]

UMI_RXP3[12]

UMI_RXN3[12]

IE_CTX_GRX_P[0..7] [17]

IE_CTX_GRX_N[0..7] [17]

IE_CRX_GTX_N[0..7][17]

IE_CRX_GTX_P[0..7][17]

PCIE_CRX_DTX_P0[35]

PCIE_CRX_DTX_N0[35]

PCIE_CTX_DRX_P0 [35]

PCIE_CTX_DRX_N0 [35]

UMI_TXP0 [12]

UMI_TXN0 [12]

UMI_TXP1 [12]

UMI_TXN1 [12]

UMI_TXP2 [12]

UMI_TXN2 [12]

UMI_TXP3 [12]

UMI_TXN3 [12]

PCIE_CTX_DRX_P3 [35]

PCIE_CTX_DRX_N3 [35]

PCIE_CRX_DTX_P3[35]

PCIE_CRX_DTX_N3[35]

PCIE_CRX_DTX_N1[33]

PCIE_CRX_DTX_P1[33]

PCIE_CTX_DRX_N1 [33]

PCIE_CTX_DRX_P1 [33]

+1.2VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

FS1r2 PCIE/UMI

Custom

5 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

FS1r2 PCIE/UMI

Custom

5 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

1.0

FS1r2 PCIE/UMI

Custom

5 51Tuesday, March 12, 2013

2012/11/22 2015/11/22

Compal Electronics, Inc.

LA-8127P

C38 .1U_0402_16V7KC38 .1U_0402_16V7K

1 2

C41 .1U_0402_16V7KC41 .1U_0402_16V7K

1 2

4 .

1U_0402_16V7KDIS@

4 .

1U_0402_16V7KDIS@

1 2

C16 .1U_0402_16V7KDIS@C16 .1U_0402_16V7KDIS@

1 2

C33 .1U_0402_16V7KC33 .1U_0402_16V7K

1 2

1 .

1U_0402_16V7KDIS@

1 .

1U_0402_16V7KDIS@

1 2

C14 .1U_0402_16V7KDIS@C14 .1U_0402_16V7KDIS@

1 2

C37 .1U_0402_16V7KC37 .1U_0402_16V7K

1 2

C35 .1U_0402_16V7KC35 .1U_0402_16V7K

1 2

C12 .1U_0402_16V7KDIS@C12 .1U_0402_16V7KDIS@

1 2

5 .

1U_0402_16V7KDIS@

5 .

1U_0402_16V7KDIS@

1 2

UMI

GPP GRAPHICS

I EXPRESS

PU1A

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

UMI

GPP GRAPHICS

I EXPRESS

PU1A

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

P_ZVDDP

AG11

P_UMI_RXN3

AE9

P_UMI_RXP3

AE8

P_UMI_RXN2

AF8

P_UMI_RXP2

AF7

P_UMI_RXN1

AG5

P_UMI_RXP1

AG6

P_UMI_RXN0

AG9

P_UMI_RXP0

AG8

P_GPP_RXN3

AC6

P_GPP_RXP3

AC5

P_GPP_RXN2

AC8

P_GPP_RXP2

AC9

P_GPP_RXN1

AD7

P_GPP_RXP1

AD8

P_GPP_RXN0

AE6

P_GPP_RXP0

AE5

P_GFX_RXN15

P_GFX_RXP15

P_GFX_RXN14

P_GFX_RXP14

P_GFX_RXN13

P_GFX_RXP13

P_GFX_RXN12

P_GFX_RXP12

P_GFX_RXN11

P_GFX_RXP11

P_GFX_RXN10

P_GFX_RXP10

P_GFX_RXN9

P_GFX_RXP9

P_GFX_RXN8

P_GFX_RXP8

P_GFX_RXN7

P_GFX_RXP7

P_GFX_RXN6

P_GFX_RXP6

P_GFX_RXN5

P_GFX_RXP5

P_GFX_RXN4

P_GFX_RXP4

P_GFX_RXN3

P_GFX_RXP3

GFX_RXN2

AA6

GFX_RXP2

AA5

GFX_RXN1

AA8

GFX_RXP1

AA9

GFX_RXN0

AB7

GFX_RXP0

AB8

P_ZVSS

AH11

P_UMI_TXN3

AE3

P_UMI_TXP3

AE2

P_UMI_TXN2

AF2

P_UMI_TXP2

AF1

P_UMI_TXN1

AF5

P_UMI_TXP1

AF4

P_UMI_TXN0

AG3

P_UMI_TXP0

AG2

P_GPP_TXN3

AB4

P_GPP_TXP3

AB5

P_GPP_TXN2

AC2

P_GPP_TXP2

AC3

P_GPP_TXN1

AD1

P_GPP_TXP1

AD2

P_GPP_TXN0

AD4

P_GPP_TXP0

AD5

P_GFX_TXN15

P_GFX_TXP15

P_GFX_TXN14

P_GFX_TXP14

P_GFX_TXN13

P_GFX_TXP13

P_GFX_TXN12

P_GFX_TXP12

P_GFX_TXN11

P_GFX_TXP11

P_GFX_TXN10

P_GFX_TXP10

P_GFX_TXN9

P_GFX_TXP9

P_GFX_TXN8

P_GFX_TXP8

P_GFX_TXN7

P_GFX_TXP7

P_GFX_TXN6

P_GFX_TXP6

P_GFX_TXN5

P_GFX_TXP5

P_GFX_TXN4

P_GFX_TXP4

P_GFX_TXN3

P_GFX_TXP3

GFX_TXN2

GFX_TXP2

GFX_TXN1

AA2

GFX_TXP1

AA3

GFX_TXN0

AB1

GFX_TXP0

AB2

C40 .1U_0402_16V7KC40 .1U_0402_16V7K

1 2

C10 .1U_0402_16V7KDIS@C10 .1U_0402_16V7KDIS@

1 2

C124 .1U_0402_16V7KC124 .1U_0402_16V7K

1 2

3 .

1U_0402_16V7KDIS@

3 .

1U_0402_16V7KDIS@

1 2

C9 .1U_0402_16V7KDIS@C9 .1U_0402_16V7KDIS@

1 2

C7 .1U_0402_16V7KDIS@C7 .1U_0402_16V7KDIS@

1 2

C11 .1U_0402_16V7KDIS@C11 .1U_0402_16V7KDIS@

1 2

C36 .1U_0402_16V7KC36 .1U_0402_16V7K

1 2

C39 .1U_0402_16V7KC39 .1U_0402_16V7K

1 2

C8 .1U_0402_16V7KDIS@C8 .1U_0402_16V7KDIS@

1 2

R2 196_0402_1%R2 196_0402_1%

1 2

6 .

1U_0402_16V7KDIS@

6 .

1U_0402_16V7KDIS@

1 2

C123 .1U_0402_16V7KC123 .1U_0402_16V7K

1 2

2 .

1U_0402_16V7KDIS@

2 .

1U_0402_16V7KDIS@

1 2

C42 .1U_0402_16V7KC42 .1U_0402_16V7K

1 2

C34 .1U_0402_16V7KC34 .1U_0402_16V7K

1 2

C44 .1U_0402_16V7KC44 .1U_0402_16V7K

1 2

C13 .1U_0402_16V7KDIS@C13 .1U_0402_16V7KDIS@

1 2

R1 196_0402_1%R1 196_0402_1%

1 2

C43 .1U_0402_16V7KC43 .1U_0402_16V7K

1 2

C15 .1U_0402_16V7KDIS@C15 .1U_0402_16V7KDIS@

1 2

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