分别用case语句和if-else语句设计一个3-8译码器电路并写出其测试激励

使用case语句的3-8译码器电路设计：

module decoder_3to8_case (
  input [2:0] in,
  output reg [7:0] out
);

always @(*) begin
  case (in)
    3'b000: out = 8'b00000001;
    3'b001: out = 8'b00000010;
    3'b010: out = 8'b00000100;
    3'b011: out = 8'b00001000;
    3'b100: out = 8'b00010000;
    3'b101: out = 8'b00100000;
    3'b110: out = 8'b01000000;
    3'b111: out = 8'b10000000;
    default: out = 8'b00000000;
  endcase
end

endmodule

使用if-else语句的3-8译码器电路设计：

module decoder_3to8_ifelse (
  input [2:0] in,
  output reg [7:0] out
);

always @(*) begin
  if (in == 3'b000) out = 8'b00000001;
  else if (in == 3'b001) out = 8'b00000010;
  else if (in == 3'b010) out = 8'b00000100;
  else if (in == 3'b011) out = 8'b00001000;
  else if (in == 3'b100) out = 8'b00010000;
  else if (in == 3'b101) out = 8'b00100000;
  else if (in == 3'b110) out = 8'b01000000;
  else if (in == 3'b111) out = 8'b10000000;
  else out = 8'b00000000;
end

endmodule

测试激励：

module decoder_3to8_testbench;

reg [2:0] in;
wire [7:0] out;

decoder_3to8_case dut1 (
  .in(in),
  .out(out)
);

decoder_3to8_ifelse dut2 (
  .in(in),
  .out(out)
);

initial begin
  // Test all input combinations
  #10 in = 3'b000; assert(out == 8'b00000001);
  #10 in = 3'b001; assert(out == 8'b00000010);
  #10 in = 3'b010; assert(out == 8'b00000100);
  #10 in = 3'b011; assert(out == 8'b00001000);
  #10 in = 3'b100; assert(out == 8'b00010000);
  #10 in = 3'b101; assert(out == 8'b00100000);
  #10 in = 3'b110; assert(out == 8'b01000000);
  #10 in = 3'b111; assert(out == 8'b10000000);

  // Test invalid input
  #10 in = 3'b1010; assert(out == 8'b00000000);

  $finish;
end

endmodule