用Verilog设计一个抢答器 功能要求如下: A.能够同时进行2位选手的抢答比赛，用2个按键作为抢答按钮； B.由主持人进行系统复位和抢答控制； C.主持人允许抢答后，计时器开始倒计时，直到有人抢答成功后，数码管上显示剩余时间和抢答成功选手号码: D.两名选手初始分数为0，如果抢答选手回答正确，得1分；若回答错误，对方得1分。显示两名选手的目前分数; E.在主持人允许前抢答被视为犯规，给出犯规标识，并自动减1分; F.在一轮抢答结束后，主持人按下复位键，返回初始计时状态，以进行下一轮抢答； G.当某个选手率先得到5分时，显示比赛结束;

Verilog代码如下：

module quiz_buzzer(input clk, input rst_n, input en, input [1:0] answer, input [1:0] buzzer, 
                   output reg [3:0] player1_score, output reg [3:0] player2_score, output reg [3:0] timer);

    parameter COUNT_MAX = 50000000; // 计时器的最大计数值
    parameter CORRECT_ANSWER = 1; // 正确答案
    parameter INCORRECT_ANSWER = 0; // 错误答案
    parameter PLAYER1 = 2'b01; // 选手1
    parameter PLAYER2 = 2'b10; // 选手2
    
    reg [25:0] count; // 计时器计数器
    reg [1:0] buzzer_pressed; // 记录哪个选手先按下了抢答器
    reg [1:0] last_winner; // 记录上一轮胜利的选手
    reg [1:0] winner; // 记录本轮胜利的选手
    reg [1:0] correct_answer; // 记录正确答案
    reg [1:0] error_flag; // 记录是否犯规
    reg [3:0] player1_score_reg; // 选手1得分寄存器
    reg [3:0] player2_score_reg; // 选手2得分寄存器
    reg [3:0] timer_reg; // 计时器寄存器
    
    // 状态机状态定义
    parameter IDLE = 2'd0; // 空闲状态
    parameter RESET = 2'd1; // 复位状态
    parameter COUNTDOWN = 2'd2; // 倒计时状态
    parameter ANSWERED = 2'd3; // 已答题状态
    parameter FINISHED = 2'd4; // 完成状态
    reg [1:0] state; // 状态机状态寄存器
    
    always @(posedge clk or negedge rst_n) begin
        if (~rst_n) begin
            count <= 0;
            buzzer_pressed <= 0;
            last_winner <= 0;
            winner <= 0;
            correct_answer <= 0;
            error_flag <= 0;
            player1_score_reg <= 0;
            player2_score_reg <= 0;
            timer_reg <= 0;
            state <= IDLE;
        end else begin
            case (state)
                IDLE: begin
                    count <= 0;
                    buzzer_pressed <= 0;
                    last_winner <= winner;
                    winner <= 0;
                    correct_answer <= 0;
                    error_flag <= 0;
                    player1_score_reg <= player1_score;
                    player2_score_reg <= player2_score;
                    timer_reg <= timer;
                    if (en) begin
                        state <= RESET;
                    end
                end
                RESET: begin
                    count <= 0;
                    buzzer_pressed <= 0;
                    last_winner <= winner;
                    winner <= 0;
                    correct_answer <= 0;
                    error_flag <= 0;
                    player1_score_reg <= player1_score;
                    player2_score_reg <= player2_score;
                    timer_reg <= timer;
                    if (~en) begin
                        state <= IDLE;
                    end else begin
                        state <= COUNTDOWN;
                    end
                end
                COUNTDOWN: begin
                    count <= count + 1;
                    buzzer_pressed <= buzzer;
                    if (count >= COUNT_MAX) begin
                        state <= ANSWERED;
                        timer_reg <= 0;
                        if (buzzer_pressed == PLAYER1) begin
                            winner <= PLAYER1;
                        end else if (buzzer_pressed == PLAYER2) begin
                            winner <= PLAYER2;
                        end
                        if (correct_answer[winner]) begin
                            player1_score_reg <= player1_score_reg + (winner == PLAYER1);
                            player2_score_reg <= player2_score_reg + (winner == PLAYER2);
                        end else begin
                            player1_score_reg <= player1_score_reg + (winner == PLAYER2);
                            player2_score_reg <= player2_score_reg + (winner == PLAYER1);
                        end
                    end else if (buzzer_pressed != 0 && buzzer_pressed != PLAYER1 && buzzer_pressed != PLAYER2) begin
                        error_flag <= 1;
                        player1_score_reg <= player1_score_reg - (last_winner == PLAYER1);
                        player2_score_reg <= player2_score_reg - (last_winner == PLAYER2);
                        state <= IDLE;
                    end else if (buzzer_pressed != 0 && buzzer_pressed != PLAYER1 && buzzer_pressed != PLAYER2 && en) begin
                        error_flag <= 1;
                        player1_score_reg <= player1_score_reg - (last_winner == PLAYER1);
                        player2_score_reg <= player2_score_reg - (last_winner == PLAYER2);
                        state <= RESET;
                    end else begin
                        timer_reg <= COUNT_MAX - count;
                    end
                end
                ANSWERED: begin
                    count <= 0;
                    buzzer_pressed <= 0;
                    last_winner <= winner;
                    winner <= 0;
                    correct_answer <= answer;
                    error_flag <= 0;
                    player1_score_reg <= player1_score;
                    player2_score_reg <= player2_score;
                    timer_reg <= timer;
                    if (en) begin
                        state <= RESET;
                    end else begin
                        state <= FINISHED;
                    end
                end
                FINISHED: begin
                    count <= 0;
                    buzzer_pressed <= 0;
                    last_winner <= winner;
                    winner <= 0;
                    correct_answer <= 0;
                    error_flag <= 0;
                    player1_score_reg <= player1_score;
                    player2_score_reg <= player2_score;
                    timer_reg <= timer;
                    if (~en) begin
                        state <= IDLE;
                    end else begin
                        state <= COUNTDOWN;
                    end
                end
            endcase
        end
    end
    
    assign player1_score = player1_score_reg;
    assign player2_score = player2_score_reg;
    assign timer = timer_reg;
    
endmodule

该Verilog模块的输入包括时钟信号`clk`、异步复位信号`rst_n`、使能信号`en`、选手1和选手2的抢答按钮输入`buzzer`和答案输入`answer`；输出包括选手1和选手2的得分`player1_score`和`player2_score`、计时器的剩余时间`timer`。

该模块的实现是一个有限状态机，具有五个状态：空闲状态（IDLE）、复位状态（RESET）、倒计时状态（COUNTDOWN）、已答题状态（ANSWERED）和完成状态（FINISHED）。在空闲状态下，如果使能信号被激活，则进入复位状态；在复位状态下，如果使能信号被取消，则返回空闲状态；否则进入倒计时状态。在倒计时状态下，计时器开始倒计时，抢答器按钮的状态被记录，如果倒计时完成，则进入已答题状态；如果抢答器按钮被按下但不是选手1或选手2，则犯规标识被设置，并返回空闲状态；如果抢答器按钮被按下但不是选手1或选手2且复位信号被激活，则减去上一轮胜利选手的得分，并返回复位状态。在已答题状态下，记录正确答案和胜利选手，并进入完成状态。在完成状态下，如果使能信号被取消，则返回空闲状态；否则返回倒计时状态。

该模块还包含了一些参数和寄存器，用于记录计时器计数器、抢答器按钮状态、上一轮胜利选手、本轮胜利选手、正确答案、犯规标识、选手得分和计时器剩余时间。模块还包含了一些常量，例如计时器的最大计数值、正确答案和错误答案的标识、选手1和选手2的标识、以及状态机状态的标识。模块最终将选手得分和计时器剩余时间输出到对应的输出端口上。