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Apollo2 Blue Datasheet
DS-A2B-0p2 Page 18 of 536 2017 Ambiq Micro, Inc.
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Table 229: STATUS Register Bits ........................................................................................... 167
Table 230: CFG Register .......................................................................................................... 168
Table 231: CFG Register Bits ................................................................................................... 168
Table 232: INTEN Register ...................................................................................................... 170
Table 233: INTEN Register Bits .............................................................................................. 170
Table 234: INTSTAT Register ................................................................................................. 171
Table 235: INTSTAT Register Bits .......................................................................................... 171
Table 236: INTCLR Register ................................................................................................... 172
Table 237: INTCLR Register Bits ............................................................................................ 173
Table 238: INTSET Register .................................................................................................... 174
Table 239: INTSET Register Bits ............................................................................................. 174
Table 240: Mapping of Direct Area Access Interrupts and Corresponding REGACCINTSTAT
Bits ............................................................................................................................................. 179
Table 241: I/O Interface Interrupt Control ................................................................................ 182
Table 242: IOSLAVE Register Map ........................................................................................ 190
Table 243: FIFOPTR Register .................................................................................................. 191
Table 244: FIFOPTR Register Bits .......................................................................................... 191
Table 245: FIFOCFG Register ................................................................................................. 191
Table 246: FIFOCFG Register Bits .......................................................................................... 192
Table 247: FIFOTHR Register ................................................................................................. 192
Table 248: FIFOTHR Register Bits .......................................................................................... 192
Table 249: FUPD Register ........................................................................................................ 193
Table 250: FUPD Register Bits ................................................................................................ 193
Table 251: FIFOCTR Register ................................................................................................. 193
Table 252: FIFOCTR Register Bits .......................................................................................... 193
Table 253: FIFOINC Register .................................................................................................. 194
Table 254: FIFOINC Register Bits ........................................................................................... 194
Table 255: CFG Register .......................................................................................................... 194
Table 256: CFG Register Bits ................................................................................................... 195
Table 257: PRENC Register ..................................................................................................... 195
Table 258: PRENC Register Bits .............................................................................................. 196
Table 259: IOINTCTL Register ............................................................................................... 196
Table 260: IOINTCTL Register Bits ........................................................................................ 196
Table 261: GENADD Register ................................................................................................. 197
Table 262: GENADD Register Bits .......................................................................................... 197
Table 263: INTEN Register ...................................................................................................... 197
Table 264: INTEN Register Bits .............................................................................................. 197
Table 265: INTSTAT Register ................................................................................................. 198
Table 266: INTSTAT Register Bits .......................................................................................... 198
Table 267: INTCLR Register ................................................................................................... 199
Table 268: INTCLR Register Bits ............................................................................................ 199
Table 269: INTSET Register .................................................................................................... 200
Table 270: INTSET Register Bits ............................................................................................. 200
Table 271: REGACCINTEN Register ...................................................................................... 201
Table 272: REGACCINTEN Register Bits .............................................................................. 201
Table 273: REGACCINTSTAT Register ................................................................................. 201