基于Verilog用两个4bit的全加器实现一个8bit的全加器，并写出其测试激励，并用debussy显示代码对应的电路原理图

下面是使用两个4位全加器实现8位全加器的 Verilog 代码：

module full_adder_8bit(
  input [7:0] a,
  input [7:0] b,
  input cin,
  output [7:0] sum,
  output cout
);

  wire [3:0] c;
  wire [3:0] s;

  // Instantiate lower 4 bits full adder
  full_adder fa0 (.a(a[3:0]), .b(b[3:0]), .cin(cin), .s(s[0]), .c(c[0]));

  // Instantiate upper 4 bits full adder
  full_adder fa1 (.a(a[7:4]), .b(b[7:4]), .cin(c[0]), .s(s[1]), .c(c[1]));

  // Connect carry out of upper 4 bits full adder to carry in of lower 4 bits full adder
  assign c[2:3] = 2'b0;
  assign c[2] = c[1];

  // Instantiate lower 4 bits adder with carry in from upper 4 bits
  full_adder fa2 (.a(s[3:0]), .b(s[3:0]), .cin(c[2]), .s(sum[3:0]), .c(c[3]));

  // Instantiate upper bit adder with carry in from lower 4 bits
  full_adder fa3 (.a(a[7]), .b(b[7]), .cin(c[3]), .s(sum[7]), .c(cout));

endmodule

module full_adder(
  input a,
  input b,
  input cin,
  output s,
  output cout
);

  assign s = a ^ b ^ cin;
  assign cout = (a & b) | (a & cin) | (b & cin);

endmodule

接下来是测试激励：

module full_adder_8bit_tb;

  reg [7:0] a;
  reg [7:0] b;
  reg cin;
  wire [7:0] sum;
  wire cout;

  full_adder_8bit dut (
    .a(a),
    .b(b),
    .cin(cin),
    .sum(sum),
    .cout(cout)
  );

  initial begin
    a = 8'b00000000;
    b = 8'b00000000;
    cin = 0;
    #10;

    a = 8'b00000001;
    b = 8'b00000001;
    cin = 0;
    #10;
    $display("1 + 1 = %d, cout = %d", sum, cout);

    a = 8'b11111111;
    b = 8'b00000001;
    cin = 0;
    #10;
    $display("255 + 1 = %d, cout = %d", sum, cout);

    a = 8'b01111111;
    b = 8'b00000001;
    cin = 1;
    #10;
    $display("127 + 1 (with carry-in) = %d, cout = %d", sum, cout);

    a = 8'b11111111;
    b = 8'b11111111;
    cin = 0;
    #10;
    $display("255 + 255 = %d, cout = %d", sum, cout);

    a = 8'b01111111;
    b = 8'b01111111;
    cin = 1;
    #10;
    $display("127 + 127 (with carry-in) = %d, cout = %d", sum, cout);

    a = 8'b11111111;
    b = 8'b11111111;
    cin = 1;
    #10;
    $display("-1 + -1 (with carry-in) = %d, cout = %d", sum, cout);

    a = 8'b10000000;
    b = 8'b01111111;
    cin = 0;
    #10;
    $display("-128 + 127 = %d, cout = %d", sum, cout);

    a = 8'b10000000;
    b = 8'b10000000;
    cin = 0;
    #10;
    $display("-128 + 128 = %d, cout = %d", sum, cout);

    a = 8'b10000000;
    b = 8'b10000000;
    cin = 1;
    #10;
    $display("-128 + 128 (with carry-in) = %d, cout = %d", sum, cout);

    a = 8'b11111111;
    b = 8'b11111111;
    cin = 0;
    #10;
    $display("-1 + -1 = %d, cout = %d", sum, cout);

    a = 8'b10000000;
    b = 8'b10000000;
    cin = 1;
    #10;
    $display("-128 + -128 (with carry-in) = %d, cout = %d", sum, cout);

    $finish;
  end

endmodule

最后，使用 Debussy 工具生成的电路原理图如下所示：