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Section number Title Page
22.3.24
TCD Last Source Address Adjustment (DMA_TCDn_SLAST).................................................................704
22.3.25
TCD Destination Address (DMA_TCDn_DADDR)...................................................................................704
22.3.26 TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)
(DMA_TCDn_CITER_ELINKYES)...........................................................................................................705
22.3.27 TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)
(DMA_TCDn_CITER_ELINKNO)............................................................................................................ 706
22.3.28
TCD Signed Destination Address Offset (DMA_TCDn_DOFF)................................................................707
22.3.29
TCD Last Destination Address Adjustment/Scatter Gather Address (DMA_TCDn_DLASTSGA).......... 707
22.3.30 TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled)
(DMA_TCDn_BITER_ELINKYES)...........................................................................................................708
22.3.31 TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)
(DMA_TCDn_BITER_ELINKNO)............................................................................................................ 709
22.3.32
TCD Control and Status (DMA_TCDn_CSR)............................................................................................ 710
22.4 Functional description...................................................................................................................................................712
22.4.1 eDMA basic data flow................................................................................................................................. 712
22.4.2 Fault reporting and handling........................................................................................................................715
22.4.3 Channel preemption..................................................................................................................................... 718
22.4.4 Performance................................................................................................................................................. 718
22.5 Initialization/application information........................................................................................................................... 722
22.5.1 eDMA initialization..................................................................................................................................... 722
22.5.2 Programming errors..................................................................................................................................... 724
22.5.3 Arbitration mode considerations..................................................................................................................725
22.5.4 Performing DMA transfers.......................................................................................................................... 726
22.5.5 Monitoring transfer descriptor status........................................................................................................... 730
22.5.6 Channel Linking...........................................................................................................................................732
22.5.7 Dynamic programming................................................................................................................................ 733
Chapter 23
Direct Memory Access Multiplexer (DMAMUX)
23.1 Introduction...................................................................................................................................................................739
23.1.1 Overview......................................................................................................................................................739
MPC5744P Reference Manual, Rev. 6, 06/2016
18 NXP Semiconductors